From patchwork Mon Mar 4 15:13:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateja Marjanovic X-Patchwork-Id: 10837937 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7935C1515 for ; Mon, 4 Mar 2019 15:20:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 63BB92A70E for ; Mon, 4 Mar 2019 15:20:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 584082A57C; Mon, 4 Mar 2019 15:20:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 166A62A3AE for ; Mon, 4 Mar 2019 15:20:16 +0000 (UTC) Received: from localhost ([127.0.0.1]:55639 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0pNt-0000Ce-CZ for patchwork-qemu-devel@patchwork.kernel.org; Mon, 04 Mar 2019 10:20:05 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57099) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0pIc-0003zU-4x for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h0pIb-0007nw-0H for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:38 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:39152 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h0pIa-0006L9-IG for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:36 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 3F8A61A2075; Mon, 4 Mar 2019 16:13:33 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw310-lin.domain.local (rtrkw310-lin.domain.local [10.10.13.57]) by mail.rt-rk.com (Postfix) with ESMTPSA id F09491A203A; Mon, 4 Mar 2019 16:13:32 +0100 (CET) From: Mateja Marjanovic To: qemu-devel@nongnu.org Date: Mon, 4 Mar 2019 16:13:17 +0100 Message-Id: <1551712405-2530-6-git-send-email-mateja.marjanovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551712405-2530-1-git-send-email-mateja.marjanovic@rt-rk.com> References: <1551712405-2530-1-git-send-email-mateja.marjanovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v3 05/13] target/mips: Add emulation of MMI instruction PEXCW X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Mateja Marjanovic Add emulation of MMI instruction PEXCW. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic Reviewed-by: Aleksandar Markovic --- target/mips/translate.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 9472477..64eb10c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24581,6 +24581,75 @@ static void gen_mmi_pexch(DisasContext *ctx) } } +/* + * PEXCW rd, rt + * + * Parallel Exchange Center Word + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---------+---------+-----------+ + * | MMI |0 0 0 0 0| rt | rd | PEXCW | MMI3 | + * +-----------+---------+---------+---------+---------+-----------+ + */ + +static void gen_mmi_pexcw(DisasContext *ctx) +{ + uint32_t pd, rt, rd; + uint32_t opcode; + + opcode = ctx->opcode; + + pd = extract32(opcode, 21, 5); + rt = extract32(opcode, 16, 5); + rd = extract32(opcode, 11, 5); + + if (unlikely(pd != 0)) { + generate_exception_end(ctx, EXCP_RI); + } else if (rd == 0) { + /* nop */ + } else if (rt == 0) { + tcg_gen_movi_i64(cpu_gpr[rd], 0); + tcg_gen_movi_i64(cpu_mmr[rd], 0); + } else if (rt == rd) { + TCGv_i64 t0 = tcg_temp_new(); + TCGv_i64 t1 = tcg_temp_new(); + uint64_t mask0 = (1ULL << 32) - 1; + uint64_t mask1 = mask0 << 32; + + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask1); + tcg_gen_shri_i64(t0, t0, 32); + tcg_gen_andi_i64(t1, cpu_mmr[rt], mask0); + tcg_gen_shli_i64(t1, t1, 32); + + tcg_gen_andi_i64(cpu_mmr[rd], cpu_mmr[rd], mask1); + tcg_gen_or_i64(cpu_mmr[rd], cpu_mmr[rd], t0); + + tcg_gen_andi_i64(cpu_gpr[rd], cpu_gpr[rd], mask0); + tcg_gen_or_i64(cpu_gpr[rd], cpu_gpr[rd], t1); + + tcg_temp_free(t0); + tcg_temp_free(t1); + } else { + TCGv_i64 t0 = tcg_temp_new(); + TCGv_i64 t1 = tcg_temp_new(); + uint64_t mask0 = (1ULL << 32) - 1; + uint64_t mask1 = mask0 << 32; + + tcg_gen_andi_i64(t0, cpu_mmr[rt], mask1); + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask1); + tcg_gen_shri_i64(t1, t1, 32); + tcg_gen_or_i64(cpu_mmr[rd], t0, t1); + + tcg_gen_andi_i64(t0, cpu_mmr[rt], mask0); + tcg_gen_shli_i64(t0, t0, 32); + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask0); + tcg_gen_or_i64(cpu_gpr[rd], t0, t1); + + tcg_temp_free(t0); + tcg_temp_free(t1); + } +} + #endif @@ -27633,7 +27702,6 @@ static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx) case MMI_OPC_3_PDIVUW: /* TODO: MMI_OPC_3_PDIVUW */ case MMI_OPC_3_POR: /* TODO: MMI_OPC_3_POR */ case MMI_OPC_3_PNOR: /* TODO: MMI_OPC_3_PNOR */ - case MMI_OPC_3_PEXCW: /* TODO: MMI_OPC_3_PEXCW */ generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI3 */ break; case MMI_OPC_3_PCPYH: @@ -27645,6 +27713,9 @@ static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx) case MMI_OPC_3_PEXCH: gen_mmi_pexch(ctx); break; + case MMI_OPC_3_PEXCW: + gen_mmi_pexcw(ctx); + break; default: MIPS_INVAL("TX79 MMI class MMI3"); generate_exception_end(ctx, EXCP_RI);