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Fri, 16 Aug 2019 08:35:47 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18e.domain1.systemhost.net (10.9.212.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 16 Aug 2019 08:36:13 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 16 Aug 2019 08:36:13 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v7 30/42] hw/timer: Declare device little or big endian Thread-Index: AQHVVAVHJHteuAQjY06hANVhOnIhew== Date: Fri, 16 Aug 2019 07:36:13 +0000 Message-ID: <1565940972287.31476@bt.com> References: <43bc5e07ac614d0e8e740bf6007ff77b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <43bc5e07ac614d0e8e740bf6007ff77b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 213.121.35.75 X-Content-Filtered-By: Mailman/MimeDel 2.1.23 Subject: [Qemu-devel] [PATCH v7 30/42] hw/timer: Declare device little or big endian X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: frederic.konrad@adacore.com, berto@igalia.com, qemu-block@nongnu.org, arikalo@wavecomp.com, pasic@linux.ibm.com, hpoussin@reactos.org, anthony.perard@citrix.com, xen-devel@lists.xenproject.org, lersek@redhat.com, jasowang@redhat.com, jiri@resnulli.us, ehabkost@redhat.com, b.galvani@gmail.com, eric.auger@redhat.com, alex.williamson@redhat.com, stefanha@redhat.com, jsnow@redhat.com, rth@twiddle.net, kwolf@redhat.com, andrew@aj.id.au, claudio.fontana@suse.com, crwulff@gmail.com, laurent@vivier.eu, sundeep.lkml@gmail.com, michael@walle.cc, qemu-ppc@nongnu.org, kbastian@mail.uni-paderborn.de, imammedo@redhat.com, fam@euphon.net, peter.maydell@linaro.org, david@redhat.com, palmer@sifive.com, keith.busch@intel.com, jcmvbkbc@gmail.com, hare@suse.com, sstabellini@kernel.org, andrew.smirnov@gmail.com, deller@gmx.de, magnus.damm@gmail.com, atar4qemu@gmail.com, minyard@acm.org, sw@weilnetz.de, yuval.shaia@oracle.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, jan.kiszka@web.de, clg@kaod.org, shorne@gmail.com, qemu-riscv@nongnu.org, i.mitsyanko@gmail.com, cohuck@redhat.com, philmd@redhat.com, amarkovic@wavecomp.com, peter.chubb@nicta.com.au, aurelien@aurel32.net, pburton@wavecomp.com, sagark@eecs.berkeley.edu, green@moxielogic.com, kraxel@redhat.com, edgar.iglesias@gmail.com, gxt@mprc.pku.edu.cn, robh@kernel.org, borntraeger@de.ibm.com, joel@jms.id.au, antonynpavlov@gmail.com, chouteau@adacore.com, Andrew.Baumann@microsoft.com, mreitz@redhat.com, walling@linux.ibm.com, dmitry.fleytman@gmail.com, mst@redhat.com, mark.cave-ayland@ilande.co.uk, jslaby@suse.cz, marex@denx.de, proljc@gmail.com, marcandre.lureau@redhat.com, alistair@alistair23.me, paul.durrant@citrix.com, david@gibson.dropbear.id.au, xiaoguangrong.eric@gmail.com, huth@tuxfamily.org, jcd@tribudubois.net, pbonzini@redhat.com, stefanb@linux.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP For each device declared with DEVICE_NATIVE_ENDIAN, find the set of targets from the set of target/hw/*/device.o. If the set of targets are all little or all big endian, re-declare the device endianness as DEVICE_LITTLE_ENDIAN or DEVICE_BIG_ENDIAN respectively. This *naive* deduction may result in genuinely native endian devices being incorrectly declared as little or big endian, but should not introduce regressions for current targets. These devices should be re-declared as DEVICE_NATIVE_ENDIAN if 1) it has a new target with an opposite endian or 2) someone informed knows better =) Signed-off-by: Tony Nguyen --- hw/timer/a9gtimer.c | 4 ++-- hw/timer/arm_mptimer.c | 4 ++-- hw/timer/arm_timer.c | 4 ++-- hw/timer/armv7m_systick.c | 2 +- hw/timer/aspeed_rtc.c | 2 +- hw/timer/cadence_ttc.c | 2 +- hw/timer/grlib_gptimer.c | 2 +- hw/timer/hpet.c | 2 +- hw/timer/imx_epit.c | 2 +- hw/timer/imx_gpt.c | 2 +- hw/timer/lm32_timer.c | 2 +- hw/timer/milkymist-sysctl.c | 2 +- hw/timer/mss-timer.c | 2 +- hw/timer/pl031.c | 2 +- hw/timer/stm32f2xx_timer.c | 2 +- hw/timer/sun4v-rtc.c | 2 +- 16 files changed, 19 insertions(+), 19 deletions(-) -- 1.8.3.1 ? diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index 09e2a7b..8bb5f6e 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -254,7 +254,7 @@ static const MemoryRegionOps a9_gtimer_this_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const MemoryRegionOps a9_gtimer_ops = { @@ -264,7 +264,7 @@ static const MemoryRegionOps a9_gtimer_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void a9_gtimer_reset(DeviceState *dev) diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 93044aa..9397218 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -190,7 +190,7 @@ static const MemoryRegionOps arm_thistimer_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const MemoryRegionOps timerblock_ops = { @@ -200,7 +200,7 @@ static const MemoryRegionOps timerblock_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void timerblock_reset(TimerBlock *tb) diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index f0a7534..22ce3ff 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -265,7 +265,7 @@ static void sp804_write(void *opaque, hwaddr offset, static const MemoryRegionOps sp804_ops = { .read = sp804_read, .write = sp804_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const VMStateDescription vmstate_sp804 = { @@ -346,7 +346,7 @@ static void icp_pit_write(void *opaque, hwaddr offset, static const MemoryRegionOps icp_pit_ops = { .read = icp_pit_read, .write = icp_pit_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void icp_pit_init(Object *obj) diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c index 9464074..3c34fd0 100644 --- a/hw/timer/armv7m_systick.c +++ b/hw/timer/armv7m_systick.c @@ -191,7 +191,7 @@ static MemTxResult systick_write(void *opaque, hwaddr addr, static const MemoryRegionOps systick_ops = { .read_with_attrs = systick_read, .write_with_attrs = systick_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid.min_access_size = 4, .valid.max_access_size = 4, }; diff --git a/hw/timer/aspeed_rtc.c b/hw/timer/aspeed_rtc.c index 19f061c..c528e47 100644 --- a/hw/timer/aspeed_rtc.c +++ b/hw/timer/aspeed_rtc.c @@ -130,7 +130,7 @@ static void aspeed_rtc_reset(DeviceState *d) static const MemoryRegionOps aspeed_rtc_ops = { .read = aspeed_rtc_read, .write = aspeed_rtc_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const VMStateDescription vmstate_aspeed_rtc = { diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 115d935..d422efe 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -389,7 +389,7 @@ static void cadence_ttc_write(void *opaque, hwaddr offset, static const MemoryRegionOps cadence_ttc_ops = { .read = cadence_ttc_read, .write = cadence_ttc_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void cadence_timer_reset(CadenceTimerState *s) diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index e45a490..dc3b028 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -313,7 +313,7 @@ static void grlib_gptimer_write(void *opaque, hwaddr addr, static const MemoryRegionOps grlib_gptimer_ops = { .read = grlib_gptimer_read, .write = grlib_gptimer_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_BIG_ENDIAN, .valid = { .min_access_size = 4, .max_access_size = 4, diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 41024f3..8268b24 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -675,7 +675,7 @@ static const MemoryRegionOps hpet_ram_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void hpet_reset(DeviceState *d) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 7a88316..a87dc06 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -282,7 +282,7 @@ static void imx_epit_cmp(void *opaque) static const MemoryRegionOps imx_epit_ops = { .read = imx_epit_read, .write = imx_epit_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const VMStateDescription vmstate_imx_timer_epit = { diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 3086c03..4eca249 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -474,7 +474,7 @@ static void imx_gpt_timeout(void *opaque) static const MemoryRegionOps imx_gpt_ops = { .read = imx_gpt_read, .write = imx_gpt_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index 6ce876c..88d2ee0 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -144,7 +144,7 @@ static void timer_write(void *opaque, hwaddr addr, static const MemoryRegionOps timer_ops = { .read = timer_read, .write = timer_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_BIG_ENDIAN, .valid = { .min_access_size = 4, .max_access_size = 4, diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c index a9d2508..c1d715f 100644 --- a/hw/timer/milkymist-sysctl.c +++ b/hw/timer/milkymist-sysctl.c @@ -220,7 +220,7 @@ static const MemoryRegionOps sysctl_mmio_ops = { .min_access_size = 4, .max_access_size = 4, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_BIG_ENDIAN, }; static void timer0_hit(void *opaque) diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c index 6add47a..26a51f1 100644 --- a/hw/timer/mss-timer.c +++ b/hw/timer/mss-timer.c @@ -197,7 +197,7 @@ timer_write(void *opaque, hwaddr offset, static const MemoryRegionOps timer_ops = { .read = timer_read, .write = timer_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 1, .max_access_size = 4 diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c index 1a7e2ee..62b0fab 100644 --- a/hw/timer/pl031.c +++ b/hw/timer/pl031.c @@ -175,7 +175,7 @@ static void pl031_write(void * opaque, hwaddr offset, static const MemoryRegionOps pl031_ops = { .read = pl031_read, .write = pl031_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pl031_init(Object *obj) diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index 4c49dc4..ecfcdad 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -265,7 +265,7 @@ static void stm32f2xx_timer_write(void *opaque, hwaddr offset, static const MemoryRegionOps stm32f2xx_timer_ops = { .read = stm32f2xx_timer_read, .write = stm32f2xx_timer_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static const VMStateDescription vmstate_stm32f2xx_timer = { diff --git a/hw/timer/sun4v-rtc.c b/hw/timer/sun4v-rtc.c index ba62adc..6b7ca75 100644 --- a/hw/timer/sun4v-rtc.c +++ b/hw/timer/sun4v-rtc.c @@ -48,7 +48,7 @@ static void sun4v_rtc_write(void *opaque, hwaddr addr, static const MemoryRegionOps sun4v_rtc_ops = { .read = sun4v_rtc_read, .write = sun4v_rtc_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_BIG_ENDIAN, }; void sun4v_rtc_init(hwaddr addr)