@@ -592,7 +592,6 @@ struct CPUMIPSState {
* CP0 Register 4
*/
target_ulong CP0_Context;
- target_ulong CP0_KScratch[MIPS_KSCRATCH_NUM];
int32_t CP0_MemoryMapID;
/*
* CP0 Register 5
@@ -1003,6 +1002,7 @@ struct CPUMIPSState {
* CP0 Register 31
*/
int32_t CP0_DESAVE;
+ target_ulong CP0_KScratch[MIPS_KSCRATCH_NUM];
/* We waste some space so we can handle shadow registers like TCs. */
TCState tcs[MIPS_SHADOW_SET_MAX];
@@ -7582,17 +7582,17 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_31:
switch (sel) {
- case 0:
+ case CP0_REG31__DESAVE:
/* EJTAG support */
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
register_name = "DESAVE";
break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG31__KSCRATCH1:
+ case CP0_REG31__KSCRATCH2:
+ case CP0_REG31__KSCRATCH3:
+ case CP0_REG31__KSCRATCH4:
+ case CP0_REG31__KSCRATCH5:
+ case CP0_REG31__KSCRATCH6:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -8339,17 +8339,17 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_31:
switch (sel) {
- case 0:
+ case CP0_REG31__DESAVE:
/* EJTAG support */
gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
register_name = "DESAVE";
break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG31__KSCRATCH1:
+ case CP0_REG31__KSCRATCH2:
+ case CP0_REG31__KSCRATCH3:
+ case CP0_REG31__KSCRATCH4:
+ case CP0_REG31__KSCRATCH5:
+ case CP0_REG31__KSCRATCH6:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -9077,17 +9077,17 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_31:
switch (sel) {
- case 0:
+ case CP0_REG31__DESAVE:
/* EJTAG support */
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
register_name = "DESAVE";
break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG31__KSCRATCH1:
+ case CP0_REG31__KSCRATCH2:
+ case CP0_REG31__KSCRATCH3:
+ case CP0_REG31__KSCRATCH4:
+ case CP0_REG31__KSCRATCH5:
+ case CP0_REG31__KSCRATCH6:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -9821,17 +9821,17 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_31:
switch (sel) {
- case 0:
+ case CP0_REG31__DESAVE:
/* EJTAG support */
gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
register_name = "DESAVE";
break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
+ case CP0_REG31__KSCRATCH1:
+ case CP0_REG31__KSCRATCH2:
+ case CP0_REG31__KSCRATCH3:
+ case CP0_REG31__KSCRATCH4:
+ case CP0_REG31__KSCRATCH5:
+ case CP0_REG31__KSCRATCH6:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel - 2]));