From patchwork Tue Sep 24 15:21:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heyi Guo X-Patchwork-Id: 11159209 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 797F4912 for ; Tue, 24 Sep 2019 16:18:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 539C720872 for ; Tue, 24 Sep 2019 16:18:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 539C720872 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:47902 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCnWE-0005O3-Iw for patchwork-qemu-devel@patchwork.kernel.org; Tue, 24 Sep 2019 12:18:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48295) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCmfA-0001LN-Pd for qemu-devel@nongnu.org; Tue, 24 Sep 2019 11:23:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iCmf9-0006lk-2o for qemu-devel@nongnu.org; Tue, 24 Sep 2019 11:23:36 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:46676 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCmf4-0006hO-ID; Tue, 24 Sep 2019 11:23:30 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 58A3B3FBB55EA3E76511; Tue, 24 Sep 2019 23:23:27 +0800 (CST) Received: from linux-Bxxcye.huawei.com (10.175.104.222) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.439.0; Tue, 24 Sep 2019 23:23:16 +0800 From: Heyi Guo To: , , , Subject: [RFC PATCH 04/12] arm/sdei: add system reset callback Date: Tue, 24 Sep 2019 23:21:43 +0800 Message-ID: <1569338511-3572-5-git-send-email-guoheyi@huawei.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1569338511-3572-1-git-send-email-guoheyi@huawei.com> References: <1569338511-3572-1-git-send-email-guoheyi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.222] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Peter Maydell , James Morse , Marc Zyngier , Jingyi Wang , Heyi Guo , wanghaibin.wang@huawei.com, Dave Martin Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" For this is a logical device which is not attached to system bus, we cannot use DeviceClass->reset interface directly. Instead we register our own reset callback to reset SDEI services when system resets. Signed-off-by: Heyi Guo Signed-off-by: Jingyi Wang Cc: Peter Maydell Cc: Dave Martin Cc: Marc Zyngier Cc: Mark Rutland Cc: James Morse --- target/arm/sdei.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/target/arm/sdei.c b/target/arm/sdei.c index b40fa36..f9a1208 100644 --- a/target/arm/sdei.c +++ b/target/arm/sdei.c @@ -1083,6 +1083,26 @@ static void qemu_sde_init(QemuSDEState *s) qemu_private_sde_init(s); } +static void qemu_sde_reset(void *opaque) +{ + int64_t ret; + CPUState *cs; + QemuSDEState *s = opaque; + + CPU_FOREACH(cs) { + QemuSDECpu *sde_cpu = get_sde_cpu(s, cs); + sdei_private_reset_common(s, cs, true); + sde_cpu->masked = true; + sde_cpu->critical_running_event = SDEI_INVALID_EVENT_ID; + sde_cpu->normal_running_event = SDEI_INVALID_EVENT_ID; + } + + ret = sdei_shared_reset_common(s, first_cpu, true); + if (ret) { + error_report("SDEI system reset failed: 0x%lx", ret); + } +} + static int qemu_sdei_pre_save(void *opaque) { QemuSDEState *s = opaque; @@ -1235,6 +1255,7 @@ static void sdei_initfn(Object *obj) sde_state = s; qemu_sde_init(s); + qemu_register_reset(qemu_sde_reset, s); } static void qemu_sde_class_init(ObjectClass *klass, void *data)