From patchwork Tue Jan 7 16:32:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg Kurz X-Patchwork-Id: 11321223 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FB2A109A for ; Tue, 7 Jan 2020 16:51:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E25152073D for ; Tue, 7 Jan 2020 16:51:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E25152073D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kaod.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53044 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ios5C-0005RG-CO for patchwork-qemu-devel@patchwork.kernel.org; Tue, 07 Jan 2020 11:51:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:48280) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iormt-0001Tk-MW for qemu-devel@nongnu.org; Tue, 07 Jan 2020 11:33:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iormr-0006dy-MV for qemu-devel@nongnu.org; Tue, 07 Jan 2020 11:32:59 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:18898) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iormp-0006ca-SW for qemu-devel@nongnu.org; Tue, 07 Jan 2020 11:32:56 -0500 Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 007GRi6N112170 for ; Tue, 7 Jan 2020 11:32:54 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0a-001b2d01.pphosted.com with ESMTP id 2xapd6j3kt-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 07 Jan 2020 11:32:54 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 7 Jan 2020 16:32:48 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 007GVxCd49480182 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 7 Jan 2020 16:31:59 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 136E15204E; Tue, 7 Jan 2020 16:32:47 +0000 (GMT) Received: from bahia.tlslab.ibm.com (unknown [9.101.4.41]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id D4DD452054; Tue, 7 Jan 2020 16:32:46 +0000 (GMT) Subject: [PATCH 2/2] pnv/psi: Consolidate some duplicated code in pnv_psi_realize() From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Tue, 07 Jan 2020 17:32:46 +0100 In-Reply-To: <157841289975.66386.6463139590245180762.stgit@bahia.tlslab.ibm.com> References: <157841289975.66386.6463139590245180762.stgit@bahia.tlslab.ibm.com> User-Agent: StGit/unknown-version MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20010716-0008-0000-0000-0000034740CB X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20010716-0009-0000-0000-00004A6782AD Message-Id: <157841476667.66386.13659183399113837990.stgit@bahia.tlslab.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-07_05:2020-01-07, 2020-01-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 clxscore=1034 suspectscore=0 adultscore=0 phishscore=0 priorityscore=1501 bulkscore=0 mlxlogscore=750 mlxscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-2001070135 X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id 007GRi6N112170 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The proper way to do that would be to use device_class_set_parent_realize(), but defining a Pnv8PsiClass and a Pnv9PsiClass types with a parent_realize pointer adds a fair amount of code. Calling pnv_psi_realize() explicitely is fine for now. This should probably be achieved with a device realize hook in the PSI base class and device_class_set_parent_realize() in the children classes. Signed-off-by: Greg Kurz Signed-off-by: Cédric Le Goater --- hw/ppc/pnv_psi.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 6c94781e377d..546232106756 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -469,6 +469,16 @@ static void pnv_psi_reset_handler(void *dev) device_reset(DEVICE(dev)); } +static void pnv_psi_realize(DeviceState *dev, Error **errp) +{ + PnvPsi *psi = PNV_PSI(dev); + + /* Default BAR for MMIO region */ + pnv_psi_set_bar(psi, psi->bar | PSIHB_BAR_EN); + + qemu_register_reset(pnv_psi_reset_handler, dev); +} + static void pnv_psi_power8_instance_init(Object *obj) { Pnv8Psi *psi8 = PNV8_PSI(obj); @@ -528,9 +538,6 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error **errp) memory_region_init_io(&psi->regs_mr, OBJECT(dev), &psi_mmio_ops, psi, "psihb", PNV_PSIHB_SIZE); - /* Default BAR for MMIO region */ - pnv_psi_set_bar(psi, psi->bar | PSIHB_BAR_EN); - /* Default sources in XIVR */ for (i = 0; i < PSI_NUM_INTERRUPTS; i++) { uint8_t xivr = irq_to_xivr[i]; @@ -538,7 +545,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error **errp) ((uint64_t) i << PSIHB_XIVR_SRC_SH); } - qemu_register_reset(pnv_psi_reset_handler, dev); + pnv_psi_realize(dev, errp); } static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) @@ -873,9 +880,7 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) memory_region_init_io(&psi->regs_mr, OBJECT(dev), &pnv_psi_p9_mmio_ops, psi, "psihb", PNV9_PSIHB_SIZE); - pnv_psi_set_bar(psi, psi->bar | PSIHB_BAR_EN); - - qemu_register_reset(pnv_psi_reset_handler, dev); + pnv_psi_realize(dev, errp); } static void pnv_psi_power9_class_init(ObjectClass *klass, void *data)