From patchwork Tue Feb 11 00:40:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 11374411 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 34A56921 for ; Tue, 11 Feb 2020 00:50:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 098FD20733 for ; Tue, 11 Feb 2020 00:50:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Vdw+549L" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 098FD20733 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=quicinc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:41686 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1JlE-0000Jw-4o for patchwork-qemu-devel@patchwork.kernel.org; Mon, 10 Feb 2020 19:50:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60401) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1Jc5-0001F1-3i for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1Jc3-00065O-MM for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:16 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:59197) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1Jc3-0004rC-9C for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1581381675; x=1612917675; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DsPb9ZrhIOPWCPBc/NbxH6Sx3sRh6HvhM1GYlZsZvgI=; b=Vdw+549LP82LkIsIFrZWNx8PrNlDVq6S9fHT7Rtip1D7j3kTlrygPeWX Cgdt3v2u0yyt/gw2x5sknZ87Z2idhfem92nTl0B+pzAVYvk88s3IYmJgg ri7WSQMIAitNqj/1MDdAPWIxoOCv5il2uGfXKU5R74CGVqC6eZSpg/4TD 8=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 10 Feb 2020 16:41:00 -0800 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg03-sd.qualcomm.com with ESMTP; 10 Feb 2020 16:41:00 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id D57F11B42; Mon, 10 Feb 2020 18:40:59 -0600 (CST) From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h Date: Mon, 10 Feb 2020 18:40:03 -0600 Message-Id: <1581381644-13678-26-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581381644-13678-1-git-send-email-tsimpson@quicinc.com> References: <1581381644-13678-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Lists the register and immediate operands for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/do_qemu.py | 86 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index f297931..7520464 100755 --- a/target/hexagon/do_qemu.py +++ b/target/hexagon/do_qemu.py @@ -810,3 +810,89 @@ realf.write(f.getvalue()) realf.close() f.close() +## +## Generate the op_regs_generated.h file +## Lists the register and immediate operands for each instruction +## +def calculate_regid_reg(tag): + def letter_inc(x): return chr(ord(x)+1) + ordered_implregs = [ 'SP','FP','LR' ] + srcdst_lett = 'X' + src_lett = 'S' + dst_lett = 'D' + retstr = "" + mapdict = {} + for reg in ordered_implregs: + reg_rd = 0 + reg_wr = 0 + if ('A_IMPLICIT_READS_'+reg) in attribdict[tag]: reg_rd = 1 + if ('A_IMPLICIT_WRITES_'+reg) in attribdict[tag]: reg_wr = 1 + if reg_rd and reg_wr: + retstr += srcdst_lett + mapdict[srcdst_lett] = reg + srcdst_lett = letter_inc(srcdst_lett) + elif reg_rd: + retstr += src_lett + mapdict[src_lett] = reg + src_lett = letter_inc(src_lett) + elif reg_wr: + retstr += dst_lett + mapdict[dst_lett] = reg + dst_lett = letter_inc(dst_lett) + return retstr,mapdict + +def calculate_regid_letters(tag): + retstr,mapdict = calculate_regid_reg(tag) + return retstr + +def strip_verif_info_in_regs(x): + y=x.replace('UREG.','') + y=y.replace('MREG.','') + return y.replace('GREG.','') + +f = StringIO() + +for tag in tags: + regs = tagregs[tag] + rregs = [] + wregs = [] + regids = "" + for regtype,regid,toss,numregs in regs: + if is_read(regid): + if regid[0] not in regids: regids += regid[0] + rregs.append(regtype+regid+numregs) + if is_written(regid): + wregs.append(regtype+regid+numregs) + if regid[0] not in regids: regids += regid[0] + for attrib in attribdict[tag]: + if attribinfo[attrib]['rreg']: + rregs.append(strip_verif_info_in_regs(attribinfo[attrib]['rreg'])) + if attribinfo[attrib]['wreg']: + wregs.append(strip_verif_info_in_regs(attribinfo[attrib]['wreg'])) + regids += calculate_regid_letters(tag) + f.write('REGINFO(%s,"%s",\t/*RD:*/\t"%s",\t/*WR:*/\t"%s")\n' % \ + (tag,regids,",".join(rregs),",".join(wregs))) + +for tag in tags: + imms = tagimms[tag] + f.write( 'IMMINFO(%s' % tag) + if not imms: + f.write(''','u',0,0,'U',0,0''') + for sign,size,shamt in imms: + if sign == 'r': sign = 's' + if not shamt: + shamt = "0" + f.write(''','%s',%s,%s''' % (sign,size,shamt)) + if len(imms) == 1: + if sign.isupper(): + myu = 'u' + else: + myu = 'U' + f.write(''','%s',0,0''' % myu) + f.write(')\n') + +realf = open('op_regs_generated.h','w') +realf.write(f.getvalue()) +realf.close() +f.close() +