From patchwork Tue Feb 11 00:39:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 11374367 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E417A921 for ; Tue, 11 Feb 2020 00:42:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B962B20733 for ; Tue, 11 Feb 2020 00:42:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="JjAJGYjH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B962B20733 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=quicinc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:41536 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1Jd0-0002nZ-SK for patchwork-qemu-devel@patchwork.kernel.org; Mon, 10 Feb 2020 19:42:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59664) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1Jbs-0000yL-Ie for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1Jbq-0004yT-W4 for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:03 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:59203) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1Jbq-0004tJ-Je for qemu-devel@nongnu.org; Mon, 10 Feb 2020 19:41:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1581381662; x=1612917662; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zn71YDhL1PCfjj8nGS+2Hkwxo00WwGvhojS4qiDjPCE=; b=JjAJGYjHBiHmDXruN0+UAdsLR11+xLl9RbjJhhFxnWlJIIidx63lVtkj B64uFMU0gu3Rq5C0G9wJPOWMDCIXLXwsr/fXEgbjr6zP4aNs/73C2k+Uo VgG0EDlGbPUHdfSdJzDvwSZzXS8Nw+qWB7GkdJho6jbO84dhwQbC6wpV0 o=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 10 Feb 2020 16:40:58 -0800 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg02-sd.qualcomm.com with ESMTP; 10 Feb 2020 16:40:57 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id 1C8511B48; Mon, 10 Feb 2020 18:40:57 -0600 (CST) From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH 02/66] Hexagon ELF Machine Definition Date: Mon, 10 Feb 2020 18:39:40 -0600 Message-Id: <1581381644-13678-3-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581381644-13678-1-git-send-email-tsimpson@quicinc.com> References: <1581381644-13678-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Define EM_HEXAGON 164 Signed-off-by: Taylor Simpson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 8fbfe60..d51e7d4 100644 --- a/include/elf.h +++ b/include/elf.h @@ -170,6 +170,8 @@ typedef struct mips_elf_abiflags_v0 { #define EM_UNICORE32 110 /* UniCore32 */ +#define EM_HEXAGON 164 /* Qualcomm Hexagon */ + #define EM_RISCV 243 /* RISC-V */ #define EM_NANOMIPS 249 /* Wave Computing nanoMIPS */