@@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev,
}
/* Currently we fixed this address as a primary for legacy BIOS. */
- cpu_physical_memory_rw(0xc0000, bios, bios_size, true);
+ cpu_physical_memory_write(0xc0000, bios, bios_size);
}
uint32_t igd_read_opregion(XenPCIPassthroughState *s)
@@ -62,6 +62,18 @@ symbol true, false;
+ address_space_write(E1, E2, E3, E4, E5)
)
+// Avoid uses of cpu_physical_memory_rw() with a constant is_write argument.
+@@
+expression E1, E2, E3;
+@@
+(
+- cpu_physical_memory_rw(E1, E2, E3, false)
++ cpu_physical_memory_read(E1, E2, E3)
+|
+- cpu_physical_memory_rw(E1, E2, E3, true)
++ cpu_physical_memory_write(E1, E2, E3)
+)
+
// Remove useless cast
@@
expression E1, E2, E3, E4, E5, E6;
@@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft)
* hft->direction == 2: gpa ==> gpa2
*/
uint64_t value;
- cpu_physical_memory_rw(hft->gpa, &value, hft->size, false);
- cpu_physical_memory_rw(hft->gpa2, &value, hft->size, true);
+ cpu_physical_memory_read(hft->gpa, &value, hft->size);
+ cpu_physical_memory_write(hft->gpa2, &value, hft->size);
}
return 0;