From patchwork Fri Feb 28 16:43:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 11412897 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E33F71871 for ; Fri, 28 Feb 2020 16:56:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA4F024672 for ; Fri, 28 Feb 2020 16:56:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="drHHr18h" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BA4F024672 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=quicinc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:50762 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7iwM-0005TY-Ub for patchwork-qemu-devel@patchwork.kernel.org; Fri, 28 Feb 2020 11:56:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57657) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7ikc-0002nj-5w for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:44:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j7ika-0005WR-4R for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:44:34 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:27035) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j7ikZ-0005Ug-Pn for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:44:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1582908271; x=1614444271; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DZ66G2uhy3HL5zJGbN02VTQejMd+x4KpirSTIKoFPns=; b=drHHr18h0J3M2yUCE77u0nLbNqfi4DNRmlqJnPePmfmA7hOeELTaKD8J pKw9sYbpBoVDKzvBgQuodAFVctBkj7s+yhj8bg5oOoQfN0pQZrAUUlkMK JTj1deIRak3MSvl3BY75Ps1cZ/NX88TiYCKHhPLeQbaLQZdRgimqqZTZe 8=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-02.qualcomm.com with ESMTP; 28 Feb 2020 08:44:28 -0800 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg01-sd.qualcomm.com with ESMTP; 28 Feb 2020 08:44:28 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id DE2EDFD8; Fri, 28 Feb 2020 10:44:27 -0600 (CST) From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 10/67] Hexagon instruction and packet types Date: Fri, 28 Feb 2020 10:43:06 -0600 Message-Id: <1582908244-304-11-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> References: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The insn_t and packet_t are the interface between instruction decoding and TCG code generation Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 133 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 target/hexagon/insn.h diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h new file mode 100644 index 0000000..a80bcb9 --- /dev/null +++ b/target/hexagon/insn.h @@ -0,0 +1,133 @@ +/* + * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef HEXAGON_INSN_H +#define HEXAGON_INSN_H + +#include "cpu.h" +#include "hex_arch_types.h" +#include "translate.h" + +#define INSTRUCTIONS_MAX 7 /* 2 pairs + loopend */ +#define REG_OPERANDS_MAX 5 +#define IMMEDS_MAX 2 + +struct Instruction; + +typedef void (*semantic_insn_t)(CPUHexagonState *env, + DisasContext *ctx, + struct Instruction *insn); + +struct Instruction { + semantic_insn_t generate; /* pointer to genptr routine */ + size1u_t regno[REG_OPERANDS_MAX]; /* reg operands including predicates */ + size2u_t opcode; + + size4u_t iclass:6; + size4u_t slot:3; + size4u_t part1:1; /* + * cmp-jumps are split into two insns. + * set for the compare and clear for the jump + */ + size4u_t extension_valid:1; /* Has a constant extender attached */ + size4u_t which_extended:1; /* If has an extender, which immediate */ + size4u_t is_dcop:1; /* Is a dcacheop */ + size4u_t is_dcfetch:1; /* Has an A_DCFETCH attribute */ + size4u_t is_load:1; /* Has A_LOAD attribute */ + size4u_t is_store:1; /* Has A_STORE attribute */ + size4u_t is_memop:1; /* Has A_MEMOP attribute */ + size4u_t is_dealloc:1; /* Is a dealloc return or dealloc frame */ + size4u_t is_aia:1; /* Is a post increment */ + size4u_t is_endloop:1; /* This is an end of loop */ + size4u_t is_2nd_jump:1; /* This is the second jump of a dual-jump packet */ + size4u_t new_value_producer_slot:4; + size4s_t immed[IMMEDS_MAX]; /* immediate field */ +}; + +typedef struct Instruction insn_t; + +struct Packet { + size2u_t num_insns; + size2u_t encod_pkt_size_in_bytes; + + /* Pre-decodes about LD/ST */ + size8u_t single_load:1; + size8u_t dual_load:1; + size8u_t single_store:1; + size8u_t dual_store:1; + size8u_t load_and_store:1; + size8u_t memop_or_nvstore:1; + + /* Pre-decodes about COF */ + size8u_t pkt_has_cof:1; /* Has any change-of-flow */ + size8u_t pkt_has_dual_jump:1; + size8u_t pkt_has_initloop:1; + size8u_t pkt_has_initloop0:1; + size8u_t pkt_has_initloop1:1; + size8u_t pkt_has_endloop:1; + size8u_t pkt_has_endloop0:1; + size8u_t pkt_has_endloop1:1; + size8u_t pkt_has_endloop01:1; + size8u_t pkt_has_call:1; + size8u_t pkt_has_jumpr:1; + size8u_t pkt_has_cjump:1; + size8u_t pkt_has_cjump_dotnew:1; + size8u_t pkt_has_cjump_dotold:1; + size8u_t pkt_has_cjump_newval:1; + size8u_t pkt_has_duplex:1; + size8u_t pkt_has_payload:1; /* Contains a constant extender */ + size8u_t pkt_has_dealloc_return:1; + + /* Pre-decodes about SLOTS */ + size8u_t slot0_valid:1; + size8u_t slot1_valid:1; + size8u_t slot2_valid:1; + size8u_t slot3_valid:1; + + /* When a predicate cancels something, track that */ + size8u_t pkt_has_fp_op:1; + size8u_t pkt_has_fpsp_op:1; + size8u_t pkt_has_fpdp_op:1; + + /* Contains a cacheop */ + size8u_t pkt_has_cacheop:1; + size8u_t pkt_has_dczeroa:1; + size8u_t pkt_has_ictagop:1; + size8u_t pkt_has_icflushop:1; + size8u_t pkt_has_dcflushop:1; + size8u_t pkt_has_dctagop:1; + size8u_t pkt_has_l2flushop:1; + size8u_t pkt_has_l2tagop:1; + + /* load store for slots */ + size8u_t pkt_has_load_s0:1; + size8u_t pkt_has_load_s1:1; + size8u_t pkt_has_store_s0:1; + size8u_t pkt_has_store_s1:1; + + /* Misc */ + size8u_t num_rops:4; /* Num risc ops in the packet */ + size8u_t pkt_access_count:2; /* Is a vmem access going to VTCM */ + size8u_t pkt_ldaccess_l2:2; /* vmem ld access to l2 */ + size8u_t pkt_ldaccess_vtcm:2; /* vmem ld access to vtcm */ + + insn_t insn[INSTRUCTIONS_MAX]; +}; + +typedef struct Packet packet_t; + +#endif