From patchwork Fri Feb 28 16:43:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 11413025 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D98F1138D for ; Fri, 28 Feb 2020 17:22:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9EE61246A0 for ; Fri, 28 Feb 2020 17:22:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="usCLG4kd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9EE61246A0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=quicinc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51206 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7jLJ-0004eZ-Re for patchwork-qemu-devel@patchwork.kernel.org; Fri, 28 Feb 2020 12:22:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58500) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7imD-0005lR-Tn for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j7imA-0007JR-P1 for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:13 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:27026) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j7imA-0005U4-Ab for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1582908370; x=1614444370; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ouv86xrunx1hWKwE1JD3OtriQEfIIJm6YVMRLDH9DXk=; b=usCLG4kd+Nx9bZqCoMyBfu92HWNH49GQcYkV3ogC0Ucd1vb4G/CULFLe Ks+1lJpOGTe86dji24ihZ3H4b+KAcwwXg1ktCdyoPMiqflt5KZxv6lv+A FjmNHAEl0RERjjesuB8zVfw3Ua5b6cEetVfThppXS22KSrGpIX0m+6Dtm 4=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-02.qualcomm.com with ESMTP; 28 Feb 2020 08:44:34 -0800 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg01-sd.qualcomm.com with ESMTP; 28 Feb 2020 08:44:33 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id B08931102; Fri, 28 Feb 2020 10:44:33 -0600 (CST) From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions Date: Fri, 28 Feb 2020 10:43:57 -0600 Message-Id: <1582908244-304-62-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> References: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Functions to support scatter/gather Signed-off-by: Taylor Simpson --- target/hexagon/mmvec/system_ext_mmvec.h | 38 +++++ target/hexagon/mmvec/system_ext_mmvec.c | 263 ++++++++++++++++++++++++++++++++ 2 files changed, 301 insertions(+) create mode 100644 target/hexagon/mmvec/system_ext_mmvec.h create mode 100644 target/hexagon/mmvec/system_ext_mmvec.c diff --git a/target/hexagon/mmvec/system_ext_mmvec.h b/target/hexagon/mmvec/system_ext_mmvec.h new file mode 100644 index 0000000..4f35966 --- /dev/null +++ b/target/hexagon/mmvec/system_ext_mmvec.h @@ -0,0 +1,38 @@ +/* + * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef HEXAGON_SYSTEM_EXT_MMVEC_H +#define HEXAGON_SYSTEM_EXT_MMVEC_H + +extern void mem_load_vector_oddva(CPUHexagonState *env, vaddr_t vaddr, + vaddr_t lookup_vaddr, int slot, int size, + size1u_t *data, int use_full_va); +extern void mem_store_vector_oddva(CPUHexagonState *env, vaddr_t vaddr, + vaddr_t lookup_vaddr, int slot, int size, + size1u_t *data, size1u_t* mask, unsigned invert, + int use_full_va); +extern void mem_vector_scatter_init(CPUHexagonState *env, int slot, + vaddr_t base_vaddr, int length, + int element_size); +extern void mem_vector_scatter_finish(CPUHexagonState *env, int slot, int op); +extern void mem_vector_gather_finish(CPUHexagonState *env, int slot); +extern void mem_vector_gather_init(CPUHexagonState *env, int slot, + vaddr_t base_vaddr, int length, + int element_size); + + +#endif diff --git a/target/hexagon/mmvec/system_ext_mmvec.c b/target/hexagon/mmvec/system_ext_mmvec.c new file mode 100644 index 0000000..e0df96e --- /dev/null +++ b/target/hexagon/mmvec/system_ext_mmvec.c @@ -0,0 +1,263 @@ +/* + * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "opcodes.h" +#include "insn.h" +#include "mmvec/macros.h" +#include "qemu.h" + +#define TYPE_LOAD 'L' +#define TYPE_STORE 'S' +#define TYPE_FETCH 'F' +#define TYPE_ICINVA 'I' + +enum mem_access_types { + access_type_INVALID = 0, + access_type_unknown = 1, + access_type_load = 2, + access_type_store = 3, + access_type_fetch = 4, + access_type_dczeroa = 5, + access_type_dccleana = 6, + access_type_dcinva = 7, + access_type_dccleaninva = 8, + access_type_icinva = 9, + access_type_ictagr = 10, + access_type_ictagw = 11, + access_type_icdatar = 12, + access_type_dcfetch = 13, + access_type_l2fetch = 14, + access_type_l2cleanidx = 15, + access_type_l2cleaninvidx = 16, + access_type_l2tagr = 17, + access_type_l2tagw = 18, + access_type_dccleanidx = 19, + access_type_dcinvidx = 20, + access_type_dccleaninvidx = 21, + access_type_dctagr = 22, + access_type_dctagw = 23, + access_type_k0unlock = 24, + access_type_l2locka = 25, + access_type_l2unlocka = 26, + access_type_l2kill = 27, + access_type_l2gclean = 28, + access_type_l2gcleaninv = 29, + access_type_l2gunlock = 30, + access_type_synch = 31, + access_type_isync = 32, + access_type_pause = 33, + access_type_load_phys = 34, + access_type_load_locked = 35, + access_type_store_conditional = 36, + access_type_barrier = 37, + access_type_memcpy_load = 39, + access_type_memcpy_store = 40, + + NUM_CORE_ACCESS_TYPES +}; + +enum ext_mem_access_types { + access_type_vload = NUM_CORE_ACCESS_TYPES, + access_type_vstore, + access_type_vload_nt, + access_type_vstore_nt, + access_type_vgather_load, + access_type_vscatter_store, + access_type_vscatter_release, + access_type_vgather_release, + access_type_vfetch, + NUM_EXT_ACCESS_TYPES +}; + +static inline +target_ulong mem_init_access(CPUHexagonState *env, int slot, size4u_t vaddr, + int width, enum mem_access_types mtype, + int type_for_xlate) +{ +#ifdef CONFIG_USER_ONLY + /* Nothing to do for Linux user mode in qemu */ + return vaddr; +#else +#error System mode not yet implemented for Hexagon +#endif +} + +static inline int check_gather_store(CPUHexagonState *env) +{ + /* First check to see if temp vreg has been updated */ + int check = env->gather_issued; + check &= env->is_gather_store_insn; + + /* In case we don't have store, suppress gather */ + if (!check) { + env->gather_issued = 0; + env->vtcm_pending = 0; /* Suppress any gather writes to memory */ + } + return check; +} + +void mem_store_vector_oddva(CPUHexagonState *env, vaddr_t vaddr, + vaddr_t lookup_vaddr, int slot, int size, + size1u_t *data, size1u_t *mask, unsigned invert, + int use_full_va) +{ + int i; + + if (!use_full_va) { + lookup_vaddr = vaddr; + } + + if (!size) { + return; + } + + int is_gather_store = check_gather_store(env); + if (is_gather_store) { + memcpy(data, &env->tmp_VRegs[0].ub[0], size); + env->VRegs_updated_tmp = 0; + env->gather_issued = 0; + } + + /* + * If it's a gather store update store data from temporary register + * And clear flag + */ + env->vstore_pending[slot] = 1; + env->vstore[slot].va = vaddr; + env->vstore[slot].size = size; + memcpy(&env->vstore[slot].data.ub[0], data, size); + if (!mask) { + memset(&env->vstore[slot].mask.ub[0], invert ? 0 : -1, size); + } else if (invert) { + for (i = 0; i < size; i++) { + env->vstore[slot].mask.ub[i] = !mask[i]; + } + } else { + memcpy(&env->vstore[slot].mask.ub[0], mask, size); + } + /* On a gather store, overwrite the store mask to emulate dropped gathers */ + if (is_gather_store) { + memcpy(&env->vstore[slot].mask.ub[0], &env->vtcm_log.mask.ub[0], size); + } + for (i = 0; i < size; i++) { + env->mem_access[slot].cdata[i] = data[i]; + } +} + +void mem_load_vector_oddva(CPUHexagonState *env, vaddr_t vaddr, + vaddr_t lookup_vaddr, int slot, int size, + size1u_t *data, int use_full_va) +{ + int i; + + if (!use_full_va) { + lookup_vaddr = vaddr; + } + + if (!size) { + return; + } + + for (i = 0; i < size; i++) { + get_user_u8(data[i], vaddr); + vaddr++; + } +} + +void mem_vector_scatter_init(CPUHexagonState *env, int slot, vaddr_t base_vaddr, + int length, int element_size) +{ + enum ext_mem_access_types access_type = access_type_vscatter_store; + int i; + + /* Translation for Store Address on Slot 1 - maybe any slot? */ + mem_init_access(env, slot, base_vaddr, 1, access_type, TYPE_STORE); + mem_access_info_t *maptr = &env->mem_access[slot]; + if (EXCEPTION_DETECTED) { + return; + } + + maptr->range = length; + + for (i = 0; i < fVECSIZE(); i++) { + env->vtcm_log.offsets.ub[i] = 0; /* Mark invalid */ + env->vtcm_log.data.ub[i] = 0; + env->vtcm_log.mask.ub[i] = 0; + } + env->vtcm_log.va_base = base_vaddr; + + env->vtcm_pending = 1; + env->vtcm_log.oob_access = 0; + env->vtcm_log.op = 0; + env->vtcm_log.op_size = 0; + return; +} + +void mem_vector_gather_init(CPUHexagonState *env, int slot, vaddr_t base_vaddr, + int length, int element_size) +{ + enum ext_mem_access_types access_type = access_type_vgather_load; + int i; + + mem_init_access(env, slot, base_vaddr, 1, access_type, TYPE_LOAD); + mem_access_info_t *maptr = &env->mem_access[slot]; + + if (EXCEPTION_DETECTED) { + return; + } + + maptr->range = length; + + for (i = 0; i < 2 * fVECSIZE(); i++) { + env->vtcm_log.offsets.ub[i] = 0x0; + } + for (i = 0; i < fVECSIZE(); i++) { + env->vtcm_log.data.ub[i] = 0; + env->vtcm_log.mask.ub[i] = 0; + env->vtcm_log.va[i] = 0; + env->tmp_VRegs[0].ub[i] = 0; + } + env->vtcm_log.oob_access = 0; + env->vtcm_log.op = 0; + env->vtcm_log.op_size = 0; + + env->vtcm_log.va_base = base_vaddr; + + /* + * Temp Reg gets updated + * This allows Store .new to grab the correct result + */ + env->VRegs_updated_tmp = 1; + env->gather_issued = 1; + + return; +} + +void mem_vector_scatter_finish(CPUHexagonState *env, int slot, int op) +{ + env->store_pending[slot] = 0; + env->vstore_pending[slot] = 0; + env->vtcm_log.size = fVECSIZE(); + + memcpy(env->mem_access[slot].cdata, &env->vtcm_log.offsets.ub[0], 256); +} + +void mem_vector_gather_finish(CPUHexagonState *env, int slot) +{ + memcpy(env->mem_access[slot].cdata, &env->vtcm_log.offsets.ub[0], 256); +}