From patchwork Fri Feb 28 16:44:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taylor Simpson X-Patchwork-Id: 11413043 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 85F881395 for ; Fri, 28 Feb 2020 17:25:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D90224699 for ; Fri, 28 Feb 2020 17:25:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="T43vuveV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D90224699 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=quicinc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51274 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7jOY-0002vj-EF for patchwork-qemu-devel@patchwork.kernel.org; Fri, 28 Feb 2020 12:25:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58575) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j7imP-0005pn-7h for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j7imM-0007RP-KZ for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:24 -0500 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:27026) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j7imK-0005U4-Vn for qemu-devel@nongnu.org; Fri, 28 Feb 2020 11:46:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1582908381; x=1614444381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0Lk5Fy/33WLGZ59ho7toXn1vR/XTO3mvmC68TZkGQ0o=; b=T43vuveVqTqb0AvzeiyuIlgAzS6+/QSwklpucNfPS+04Wv91CDHfwkqi A7Rltsmzd7EgVaa6y7z+iWZjbKfKdubiAAgzzldGIUTh3WpUS5sJM+u9k Ggue+gZePo3dmfP5bN40YfnplLVb/Kxz98xxAAyZUX4mfgAiqOpXNTLo6 E=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-02.qualcomm.com with ESMTP; 28 Feb 2020 08:44:34 -0800 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg01-sd.qualcomm.com with ESMTP; 28 Feb 2020 08:44:34 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id 16EE211AF; Fri, 28 Feb 2020 10:44:34 -0600 (CST) From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 65/67] Hexagon HVX TCG generation Date: Fri, 28 Feb 2020 10:44:01 -0600 Message-Id: <1582908244-304-66-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> References: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Taylor Simpson --- target/hexagon/genptr_helpers.h | 202 ++++++++++++++++++++++++++++++++++++++++ target/hexagon/genptr.c | 1 + 2 files changed, 203 insertions(+) diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h index e342f29..84479f8 100644 --- a/target/hexagon/genptr_helpers.h +++ b/target/hexagon/genptr_helpers.h @@ -844,4 +844,206 @@ static inline void gen_lshiftr_4_4u(TCGv dst, TCGv src, int32_t shift_amt) } } +static inline uint32_t new_temp_vreg_offset(DisasContext *ctx, int num) +{ + uint32_t offset = + offsetof(CPUHexagonState, temp_vregs[ctx->ctx_temp_vregs_idx]); + + HEX_DEBUG_LOG("new_temp_vreg_offset: %d\n", ctx->ctx_temp_vregs_idx); + g_assert(ctx->ctx_temp_vregs_idx + num - 1 < TEMP_VECTORS_MAX); + ctx->ctx_temp_vregs_idx += num; + return offset; +} + +static inline uint32_t new_temp_qreg_offset(DisasContext *ctx) +{ + uint32_t offset = + offsetof(CPUHexagonState, temp_qregs[ctx->ctx_temp_qregs_idx]); + + HEX_DEBUG_LOG("new_temp_qreg_offset: %d\n", ctx->ctx_temp_qregs_idx); + g_assert(ctx->ctx_temp_qregs_idx < TEMP_VECTORS_MAX); + ctx->ctx_temp_qregs_idx++; + return offset; +} + +static inline void gen_read_qreg(TCGv_ptr var, int num, int vtmp) +{ + uint32_t offset = offsetof(CPUHexagonState, QRegs[(num)]); + TCGv_ptr src = tcg_temp_new_ptr(); + tcg_gen_addi_ptr(src, cpu_env, offset); + gen_memcpy(var, src, sizeof(mmqreg_t)); + tcg_temp_free_ptr(src); +} + +static inline void gen_read_vreg_ptr_src(TCGv_ptr ptr_src, int num, int vtmp) +{ + TCGv zero = tcg_const_tl(0); + TCGv offset_future = + tcg_const_tl(offsetof(CPUHexagonState, future_VRegs[num])); + TCGv offset_vregs = + tcg_const_tl(offsetof(CPUHexagonState, VRegs[num])); + TCGv offset_tmp_vregs = + tcg_const_tl(offsetof(CPUHexagonState, tmp_VRegs[num])); + TCGv offset = tcg_temp_new(); + TCGv_ptr offset_ptr = tcg_temp_new_ptr(); + TCGv new_written = tcg_temp_new(); + TCGv tmp_written = tcg_temp_new(); + + /* + * new_written = (hex_VRegs_select >> num) & 1; + * offset = new_written ? offset_future, offset_vregs; + */ + tcg_gen_shri_tl(new_written, hex_VRegs_select, num); + tcg_gen_andi_tl(new_written, new_written, 1); + tcg_gen_movcond_tl(TCG_COND_NE, offset, new_written, zero, + offset_future, offset_vregs); + + /* + * tmp_written = (hex_VRegs_updated_tmp >> num) & 1; + * if (tmp_written) offset = offset_tmp_vregs; + */ + tcg_gen_shri_tl(tmp_written, hex_VRegs_updated_tmp, num); + tcg_gen_andi_tl(tmp_written, tmp_written, 1); + tcg_gen_movcond_tl(TCG_COND_NE, offset, tmp_written, zero, + offset_tmp_vregs, offset); + + if (vtmp == EXT_TMP) { + TCGv vregs_updated = tcg_temp_new(); + TCGv temp = tcg_temp_new(); + + /* + * vregs_updated = hex_VRegs_updates & (1 << num); + * if (vregs_updated) { + * offset = offset_future; + * hex_VRegs_updated ^= (1 << num); + * } + */ + tcg_gen_andi_tl(vregs_updated, hex_VRegs_updated, 1 << num); + tcg_gen_movcond_tl(TCG_COND_NE, offset, vregs_updated, zero, + offset_future, offset); + tcg_gen_xori_tl(temp, hex_VRegs_updated, 1 << num); + tcg_gen_movcond_tl(TCG_COND_NE, hex_VRegs_updated, vregs_updated, zero, + temp, hex_VRegs_updated); + + tcg_temp_free(vregs_updated); + tcg_temp_free(temp); + } + + tcg_gen_ext_i32_ptr(offset_ptr, offset); + tcg_gen_add_ptr(ptr_src, cpu_env, offset_ptr); + + tcg_temp_free(zero); + tcg_temp_free(offset_future); + tcg_temp_free(offset_vregs); + tcg_temp_free(offset_tmp_vregs); + tcg_temp_free(offset); + tcg_temp_free_ptr(offset_ptr); + tcg_temp_free(new_written); + tcg_temp_free(tmp_written); +} + +static inline void gen_read_vreg_readonly(TCGv_ptr var, int num, int vtmp) +{ + TCGv_ptr ptr_src = tcg_temp_new_ptr(); + gen_read_vreg_ptr_src(ptr_src, num, vtmp); + tcg_gen_addi_ptr(var, ptr_src, 0); + tcg_temp_free_ptr(ptr_src); +} + +static inline void gen_read_vreg(TCGv_ptr var, int num, int vtmp) +{ + TCGv_ptr ptr_src = tcg_temp_new_ptr(); + gen_read_vreg_ptr_src(ptr_src, num, vtmp); + gen_memcpy(var, ptr_src, sizeof(mmvector_t)); + tcg_temp_free_ptr(ptr_src); +} + +static inline void gen_read_vreg_pair(TCGv_ptr var, int num, int vtmp) +{ + TCGv_ptr v0 = tcg_temp_new_ptr(); + TCGv_ptr v1 = tcg_temp_new_ptr(); + tcg_gen_addi_ptr(v0, var, offsetof(mmvector_pair_t, v[0])); + gen_read_vreg(v0, num ^ 0, vtmp); + tcg_gen_addi_ptr(v1, var, offsetof(mmvector_pair_t, v[1])); + gen_read_vreg(v1, num ^ 1, vtmp); + tcg_temp_free_ptr(v0); + tcg_temp_free_ptr(v1); +} + +static inline void gen_log_vreg_write(TCGv_ptr var, int num, int vnew, + int slot_num) +{ + TCGv cancelled = tcg_temp_local_new(); + TCGLabel *label_end = gen_new_label(); + + /* Don't do anything if the slot was cancelled */ + gen_slot_cancelled_check(cancelled, slot_num); + tcg_gen_brcondi_tl(TCG_COND_NE, cancelled, 0, label_end); + { + TCGv mask = tcg_const_tl(1 << num); + TCGv_ptr dst = tcg_temp_new_ptr(); + if (vnew != EXT_TMP) { + tcg_gen_or_tl(hex_VRegs_updated, hex_VRegs_updated, mask); + } + if (vnew == EXT_NEW) { + tcg_gen_or_tl(hex_VRegs_select, hex_VRegs_select, mask); + } + if (vnew == EXT_TMP) { + tcg_gen_or_tl(hex_VRegs_updated_tmp, hex_VRegs_updated_tmp, mask); + } + tcg_gen_addi_ptr(dst, cpu_env, + offsetof(CPUHexagonState, future_VRegs[num])); + gen_memcpy(dst, var, sizeof(mmvector_t)); + if (vnew == EXT_TMP) { + TCGv_ptr src = tcg_temp_new_ptr(); + tcg_gen_addi_ptr(dst, cpu_env, + offsetof(CPUHexagonState, tmp_VRegs[num])); + tcg_gen_addi_ptr(src, cpu_env, + offsetof(CPUHexagonState, future_VRegs[num])); + gen_memcpy(dst, src, sizeof(mmvector_t)); + tcg_temp_free_ptr(src); + } + tcg_temp_free(mask); + tcg_temp_free_ptr(dst); + } + gen_set_label(label_end); + + tcg_temp_free(cancelled); +} + +static inline void gen_log_vreg_write_pair(TCGv_ptr var, int num, int vnew, + int slot_num) +{ + TCGv_ptr v0 = tcg_temp_local_new_ptr(); + TCGv_ptr v1 = tcg_temp_local_new_ptr(); + tcg_gen_addi_ptr(v0, var, offsetof(mmvector_pair_t, v[0])); + gen_log_vreg_write(v0, num ^ 0, vnew, slot_num); + tcg_gen_addi_ptr(v1, var, offsetof(mmvector_pair_t, v[1])); + gen_log_vreg_write(v1, num ^ 1, vnew, slot_num); + tcg_temp_free_ptr(v0); + tcg_temp_free_ptr(v1); +} + +static inline void gen_log_qreg_write(TCGv_ptr var, int num, int vnew, + int slot_num) +{ + TCGv cancelled = tcg_temp_local_new(); + TCGLabel *label_end = gen_new_label(); + + /* Don't do anything if the slot was cancelled */ + gen_slot_cancelled_check(cancelled, slot_num); + tcg_gen_brcondi_tl(TCG_COND_NE, cancelled, 0, label_end); + { + TCGv_ptr dst = tcg_temp_new_ptr(); + tcg_gen_addi_ptr(dst, cpu_env, + offsetof(CPUHexagonState, future_QRegs[num])); + gen_memcpy(dst, var, sizeof(mmqreg_t)); + tcg_gen_ori_tl(hex_QRegs_updated, hex_QRegs_updated, 1 << num); + tcg_temp_free_ptr(dst); + } + gen_set_label(label_end); + + tcg_temp_free(cancelled); +} + #endif diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 6b9cc0d..588360d 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -25,6 +25,7 @@ #include "opcodes.h" #include "translate.h" #include "macros.h" +#include "mmvec/macros.h" #include "genptr_helpers.h" #include "helper_overrides.h"