From patchwork Thu Apr 21 16:24:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 8902781 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 94E53BF29F for ; Thu, 21 Apr 2016 16:24:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A40920303 for ; Thu, 21 Apr 2016 16:24:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E45A200BE for ; Thu, 21 Apr 2016 16:24:38 +0000 (UTC) Received: from localhost ([::1]:44022 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atHPB-0006xz-NE for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 Apr 2016 12:24:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atHOy-0006s4-Ra for qemu-devel@nongnu.org; Thu, 21 Apr 2016 12:24:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1atHOv-0004y6-KR for qemu-devel@nongnu.org; Thu, 21 Apr 2016 12:24:24 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]:54832) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atHOv-0004xS-Fu for qemu-devel@nongnu.org; Thu, 21 Apr 2016 12:24:21 -0400 Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 06B7720D8F for ; Thu, 21 Apr 2016 12:24:20 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Thu, 21 Apr 2016 12:24:20 -0400 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=braap.org; h=cc :content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=40Ewi i+e0WZ57UzVaWhnAd30qI8=; b=NY0mONiNBmE9mxOCCUuo6ds3+vfj7iuLa1O8d 1IWllcHvdCTRSvxTSsQnrjkfxaUYszKeLF/5zPSId/MCl3E1QP/Rpu5LbRaoh2Sl +cUjMR6Y0tlAZSS/cYiZPadauukCwhOLLagcw8Ne+9an/Zh2LrRU5C6+X0VTWggI O8y+jM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-sasl-enc :x-sasl-enc; s=smtpout; bh=40Ewii+e0WZ57UzVaWhnAd30qI8=; b=HPPUz VLsNxR8wdEG1tPtCerN4evyivr8bH3644sC+4uXNKmPJVPbKUOnUv05qYzN19JDV fLjs3EPqT7HTk5uLsNRO5ll0/E8n0PHnG24tQFZWrKEiIt3wRCaR9Qse/GeyUh3u 2SLMkWjNYX4KfU6XKGn96DWdpHgnx9UrecrPdI= X-Sasl-enc: 3PM8PvS5LUw9Cr1K3UicCq/XKmIeFmhKnReJSYSbUX44 1461255859 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id B5A9A6801AC; Thu, 21 Apr 2016 12:24:19 -0400 (EDT) Date: Thu, 21 Apr 2016 12:24:19 -0400 From: "Emilio G. Cota" To: Richard Henderson Message-ID: <20160421162419.GA14026@flamenco> References: <1461107270-19234-1-git-send-email-cota@braap.org> <1461107270-19234-6-git-send-email-cota@braap.org> <57179DE0.5080701@twiddle.net> <20160420171734.GA1124@flamenco> <5717C2A1.9010805@twiddle.net> <20160420181132.GA24862@flamenco> <5717DB01.5080802@twiddle.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5717DB01.5080802@twiddle.net> User-Agent: Mutt/1.5.23 (2014-03-12) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.26 Subject: Re: [Qemu-devel] [PATCH v3 05/11] qemu-thread: add simple test-and-set spinlock X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: MTTCG Devel , Peter Maydell , Peter Crosthwaite , QEMU Developers , Sergey Fedorov , Paolo Bonzini , Alex =?iso-8859-1?Q?Benn=E9e?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Apr 20, 2016 at 12:39:45 -0700, Richard Henderson wrote: > On 04/20/2016 11:11 AM, Emilio G. Cota wrote: > >On Wed, Apr 20, 2016 at 10:55:45 -0700, Richard Henderson wrote: > >>On 04/20/2016 10:17 AM, Emilio G. Cota wrote: (snip) > >My comment was related to this: > > > >>[...] do note that there are compiler primitives for test-and-set that > >>(can be) simpler for a cpu to implement than xchg. > > > >What compiler (I assume gcc) primitives are these? I couldn't find them. > > __sync_lock_test_and_set and __atomic_test_and_set. > > Both expand to ldstub on sparcv7, tas on coldfire, tas.b on sh. > None of these are xchg operations. > > I had forgotten that there wasn't a __sync_exchange builtin, so > __sync_lock_test_and_set plays double-duty as both xchg and test-and-set. > > But when __atomic builtins are available, __atomic_exchange does not fall > back; you must use __atomic_test_and_set for less capable hosts. > > But of course none of this is really relevant for normal hosts. I see. Maybe we should do something like the appended, then? Emilio diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h index 5bc4d6c..6132dad 100644 --- a/include/qemu/atomic.h +++ b/include/qemu/atomic.h @@ -134,6 +134,7 @@ }) /* Provide shorter names for GCC atomic builtins, return old value */ +#define atomic_test_and_set(ptr) __atomic_test_and_set(ptr, __ATOMIC_SEQ_CST) #define atomic_fetch_inc(ptr) __atomic_fetch_add(ptr, 1, __ATOMIC_SEQ_CST) #define atomic_fetch_dec(ptr) __atomic_fetch_sub(ptr, 1, __ATOMIC_SEQ_CST) #define atomic_fetch_add(ptr, n) __atomic_fetch_add(ptr, n, __ATOMIC_SEQ_CST) @@ -328,6 +329,7 @@ #endif /* Provide shorter names for GCC atomic builtins. */ +#define atomic_test_and_set(ptr) atomic_xchg(ptr, true) #define atomic_fetch_inc(ptr) __sync_fetch_and_add(ptr, 1) #define atomic_fetch_dec(ptr) __sync_fetch_and_add(ptr, -1) #define atomic_fetch_add __sync_fetch_and_add diff --git a/include/qemu/thread.h b/include/qemu/thread.h index a216941..39ff1ac 100644 --- a/include/qemu/thread.h +++ b/include/qemu/thread.h @@ -74,7 +74,7 @@ static inline void qemu_spin_init(QemuSpin *spin) static inline void qemu_spin_lock(QemuSpin *spin) { - while (atomic_xchg(&spin->value, true)) { + while (atomic_test_and_set(&spin->value)) { while (atomic_read(&spin->value)) { cpu_relax(); } @@ -83,7 +83,7 @@ static inline void qemu_spin_lock(QemuSpin *spin) static inline int qemu_spin_trylock(QemuSpin *spin) { - if (atomic_xchg(&spin->value, true)) { + if (atomic_test_and_set(&spin->value)) { return -EBUSY; } return 0;