From patchwork Fri Jul 8 03:00:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 9219985 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DE41D60467 for ; Fri, 8 Jul 2016 03:01:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D392727F95 for ; Fri, 8 Jul 2016 03:01:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C733F27F9E; Fri, 8 Jul 2016 03:01:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4A0E527F95 for ; Fri, 8 Jul 2016 03:01:02 +0000 (UTC) Received: from localhost ([::1]:43250 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bLM2G-0006H6-Bq for patchwork-qemu-devel@patchwork.kernel.org; Thu, 07 Jul 2016 23:01:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bLM20-0006Gz-Ed for qemu-devel@nongnu.org; Thu, 07 Jul 2016 23:00:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bLM1w-0006xE-9M for qemu-devel@nongnu.org; Thu, 07 Jul 2016 23:00:43 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:50683) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bLM1t-0006s4-Qm for qemu-devel@nongnu.org; Thu, 07 Jul 2016 23:00:40 -0400 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id C1ABA20179; Thu, 7 Jul 2016 23:00:28 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute6.internal (MEProxy); Thu, 07 Jul 2016 23:00:28 -0400 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=braap.org; h=cc :content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=U8oQA MicFOtEg9LLcTwkYV8vfVw=; b=zBN+4OI3crmzNt7ylAiVPYuIt0zACpMeLMHro uzujswvs8WWtbCxYp9RRWDHz34a+i/Wmhgpa3MpwgoBcM6V+t71MtiahIk3FFwQM RdNcfXM9razl78tJX4Md0KMegSG/MFoMG6f3vuZiC4Y0eZJJ3ZQWgfovl0eubOKn E1KXss= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-sasl-enc :x-sasl-enc; s=smtpout; bh=U8oQAMicFOtEg9LLcTwkYV8vfVw=; b=R/GDV yUSuQIQHf63n6UXFaBp8KhfSVwJHzo/wB5PRHbCm80FxNUJ6e/uWYImHtR2RcJTH Z/IryRu58X6X7FdwX+6cTEf5gjQuWLeiCeJ1x/dWQCcqyAof7iIa21dWVYMzqu98 2h+QOEd+a5bmpWvF5ITEvHyd8HV2+TloS72gCE= X-Sasl-enc: v2+wsm9+R9fLVcLoE3HOFtDkrd8ADncn427Hix6J28UK 1467946828 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 7666BF29F5; Thu, 7 Jul 2016 23:00:28 -0400 (EDT) Date: Thu, 7 Jul 2016 23:00:28 -0400 From: "Emilio G. Cota" To: Richard Henderson Message-ID: <20160708030028.GB28765@flamenco> References: <1467392693-22715-1-git-send-email-rth@twiddle.net> <1467392693-22715-11-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1467392693-22715-11-git-send-email-rth@twiddle.net> User-Agent: Mutt/1.5.23 (2014-03-12) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: Re: [Qemu-devel] [PATCH v2 10/27] tcg: Add atomic128 helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, qemu-devel@nongnu.org, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Jul 01, 2016 at 10:04:36 -0700, Richard Henderson wrote: > Force the use of cmpxchg16b on x86_64. > > Wikipedia suggests that only very old AMD64 (circa 2004) did not have > this instruction. Further, it's required by Windows 8 so no new cpus > will ever omit it. > > If we truely care about these, then we could check this at startup time > and then avoid executing paths that use it. > > Signed-off-by: Richard Henderson > --- > configure | 29 ++++++++++++- > cputlb.c | 6 +++ > include/qemu/int128.h | 6 +++ > softmmu_template.h | 110 +++++++++++++++++++++++++++++++++++++------------- > tcg/tcg.h | 22 ++++++++++ > 5 files changed, 144 insertions(+), 29 deletions(-) > > diff --git a/configure b/configure > index 59ea124..586abd6 100755 > --- a/configure > +++ b/configure > @@ -1201,7 +1201,10 @@ case "$cpu" in > cc_i386='$(CC) -m32' > ;; > x86_64) > - CPU_CFLAGS="-m64" > + # ??? Only extremely old AMD cpus do not have cmpxchg16b. > + # If we truly care, we should simply detect this case at > + # runtime and generate the fallback to serial emulation. > + CPU_CFLAGS="-m64 -mcx16" > LDFLAGS="-m64 $LDFLAGS" > cc_i386='$(CC) -m32' > ;; > @@ -4434,6 +4437,26 @@ if compile_prog "" "" ; then > int128=yes > fi > > +######################################### > +# See if 128-bit atomic operations are supported. > + > +atomic128=no > +if test "$int128" = "yes"; then > + cat > $TMPC << EOF > +int main(void) > +{ > + unsigned __int128 x = 0, y = 0; > + y = __atomic_load_16(&x, 0); > + __atomic_store_16(&x, y, 0); > + __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0); > + return 0; > +} > +EOF > + if compile_prog "" "" ; then > + atomic128=yes > + fi > +fi Would it be correct to just trust that gcc is doing the right thing? As in this delta over the patch: I might be missing other CFLAGS to be set, but the idea is that if a program with __atomic[..]_16 links, then we should be OK. This way we would handle correctly even those old AMD cpus, and would also handle non-x86 architectures that implement cmpxchg16. Emilio --- a/configure +++ b/configure @@ -1201,10 +1201,7 @@ case "$cpu" in cc_i386='$(CC) -m32' ;; x86_64) - # ??? Only extremely old AMD cpus do not have cmpxchg16b. - # If we truly care, we should simply detect this case at - # runtime and generate the fallback to serial emulation. - CPU_CFLAGS="-m64 -mcx16" + CPU_CFLAGS="-m64" LDFLAGS="-m64 $LDFLAGS" cc_i386='$(CC) -m32' ;; @@ -4454,6 +4451,10 @@ int main(void) EOF if compile_prog "" "" ; then atomic128=yes + elif compile_prog "-mcx16" "" ; then + QEMU_CFLAGS="$QEMU_CFLAGS -mcx16" + EXTRA_CFLAGS="$EXTRA_CFLAGS -mcx16" + atomic128=yes fi fi