From patchwork Fri Sep 16 11:14:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 9335507 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BFCA860839 for ; Fri, 16 Sep 2016 11:20:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B126129F42 for ; Fri, 16 Sep 2016 11:20:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A567C29F44; Fri, 16 Sep 2016 11:20:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6ED1029F42 for ; Fri, 16 Sep 2016 11:20:51 +0000 (UTC) Received: from localhost ([::1]:39773 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkrCM-0001K8-Fo for patchwork-qemu-devel@patchwork.kernel.org; Fri, 16 Sep 2016 07:20:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39762) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkr8e-0007EP-Dl for qemu-devel@nongnu.org; Fri, 16 Sep 2016 07:17:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkr8a-0006LR-80 for qemu-devel@nongnu.org; Fri, 16 Sep 2016 07:16:59 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:45384 helo=mail.rt-rk.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkr8a-0006LM-0E for qemu-devel@nongnu.org; Fri, 16 Sep 2016 07:16:56 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 403AA1A461D; Fri, 16 Sep 2016 13:16:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from mcs19.domain.local (mcs19.domain.local [10.10.13.51]) by mail.rt-rk.com (Postfix) with ESMTPSA id 23BCD1A4617; Fri, 16 Sep 2016 13:16:55 +0200 (CEST) From: Aleksandar Markovic To: qemu-devel@nongnu.org, riku.voipio@iki.fi, peter.maydell@linaro.org, aurelien@aurel32.net, leon.alrae@imgtec.com, petar.jovanovic@imgtec.com, miodrag.dinic@imgtec.com, aleksandar.rikalo@imgtec.com, aleksandar.markovic@imgtec.com Date: Fri, 16 Sep 2016 13:14:07 +0200 Message-Id: <20160916111422.109959-6-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160916111422.109959-1-aleksandar.markovic@rt-rk.com> References: <20160916111422.109959-1-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 5/7] linux-user: Fix certain argument alignment cases for Mips64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic The function that is changed in this patch is supposed to indicate that there was certaing argument rearangement related to 64-bit arguments on 32-bit platforms. The background on such rearangements can be found, for example, in the man page for syscall(2). However, for 64-bit Mips architectures there is no such rearangement, and this patch reflects it. Signed-off-by: Aleksandar Rikalo Signed-off-by: Aleksandar Markovic --- linux-user/syscall.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index ca06943..ee23b29 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -620,7 +620,14 @@ static inline int regpairs_aligned(void *cpu_env) { return ((((CPUARMState *)cpu_env)->eabi) == 1) ; } #elif defined(TARGET_MIPS) -static inline int regpairs_aligned(void *cpu_env) { return 1; } +static inline int regpairs_aligned(void *cpu_env) +{ +#if TARGET_ABI_BITS == 32 + return 1; +#else + return 0; +#endif +} #elif defined(TARGET_PPC) && !defined(TARGET_PPC64) /* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs * of registers which translates to the same as ARM/MIPS, because we start with