From patchwork Tue Sep 27 23:30:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 9352973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8541E60757 for ; Tue, 27 Sep 2016 23:32:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 769EA28F2F for ; Tue, 27 Sep 2016 23:32:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6ACDA28F43; Tue, 27 Sep 2016 23:32:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, URIBL_RED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9A75128F2F for ; Tue, 27 Sep 2016 23:32:01 +0000 (UTC) Received: from localhost ([::1]:54675 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bp1qy-00049X-Q8 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 27 Sep 2016 19:32:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46581) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bp1qV-000459-VN for qemu-devel@nongnu.org; Tue, 27 Sep 2016 19:31:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bp1qR-00051p-LR for qemu-devel@nongnu.org; Tue, 27 Sep 2016 19:31:30 -0400 Received: from mail-out.m-online.net ([212.18.0.9]:38774) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bp1qR-00051I-B9 for qemu-devel@nongnu.org; Tue, 27 Sep 2016 19:31:27 -0400 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3skHCf61vlz3hjRD; Wed, 28 Sep 2016 01:31:26 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3skHCf5D2jzvknn; Wed, 28 Sep 2016 01:31:26 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id YcdFsI88JFfy; Wed, 28 Sep 2016 01:31:24 +0200 (CEST) X-Auth-Info: sv1kWM2tOtGsCLdgbMV2J1Xlqjm6XXhsR8EX6qpxqZA= Received: from chi.lan (unknown [195.140.253.167]) by mail.mnet-online.de (Postfix) with ESMTPA; Wed, 28 Sep 2016 01:31:24 +0200 (CEST) From: Marek Vasut To: qemu-devel@nongnu.org Date: Wed, 28 Sep 2016 01:30:46 +0200 Message-Id: <20160927233049.5429-4-marex@denx.de> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160927233049.5429-1-marex@denx.de> References: <20160927233049.5429-1-marex@denx.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 212.18.0.9 Subject: [Qemu-devel] [PATCH 4/7] nios2: Add IIC interrupt controller emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Jeff Da Silva , Chris Wulff , Sandra Loosemore , Yves Vandervennet , Ley Foon Tan Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chris Wulff Add the Altera Nios2 internal interrupt controller model. Signed-off-by: Marek Vasut Cc: Chris Wulff Cc: Jeff Da Silva Cc: Ley Foon Tan Cc: Sandra Loosemore Cc: Yves Vandervennet --- hw/intc/Makefile.objs | 1 + hw/intc/nios2_iic.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 104 insertions(+) create mode 100644 hw/intc/nios2_iic.c diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs index 05ec21b..3c29fe7 100644 --- a/hw/intc/Makefile.objs +++ b/hw/intc/Makefile.objs @@ -38,3 +38,4 @@ obj-$(CONFIG_S390_FLIC_KVM) += s390_flic_kvm.o obj-$(CONFIG_ASPEED_SOC) += aspeed_vic.o obj-$(CONFIG_ARM_GIC) += arm_gicv3_cpuif.o obj-$(CONFIG_MIPS_CPS) += mips_gic.o +obj-$(CONFIG_NIOS2) += nios2_iic.o diff --git a/hw/intc/nios2_iic.c b/hw/intc/nios2_iic.c new file mode 100644 index 0000000..6da2cce --- /dev/null +++ b/hw/intc/nios2_iic.c @@ -0,0 +1,103 @@ +/* + * QEMU Altera Internal Interrupt Controller. + * + * Copyright (c) 2012 Chris Wulff + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "qapi/error.h" + +#include "hw/sysbus.h" +#include "cpu.h" + +#define TYPE_ALTERA_IIC "altera,iic" +#define ALTERA_IIC(obj) \ + OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC) + +typedef struct AlteraIIC { + SysBusDevice parent_obj; + void *cpu; + qemu_irq parent_irq; +} AlteraIIC; + +static void update_irq(AlteraIIC *pv) +{ + CPUNios2State *env = &((Nios2CPU*)(pv->cpu))->env; + + qemu_set_irq(pv->parent_irq, + env->regs[CR_IPENDING] & env->regs[CR_IENABLE]); +} + +static void irq_handler(void *opaque, int irq, int level) +{ + AlteraIIC *pv = opaque; + CPUNios2State *env = &((Nios2CPU*)(pv->cpu))->env; + + env->regs[CR_IPENDING] &= ~(1 << irq); + env->regs[CR_IPENDING] |= !!level << irq; + + update_irq(pv); +} + +static void altera_iic_init(Object *obj) +{ + AlteraIIC *pv = ALTERA_IIC(obj); + + qdev_init_gpio_in(DEVICE(pv), irq_handler, 32); + sysbus_init_irq(SYS_BUS_DEVICE(obj), &pv->parent_irq); +} + +static Property altera_iic_properties[] = { + DEFINE_PROP_PTR("cpu", AlteraIIC, cpu), + DEFINE_PROP_END_OF_LIST(), +}; + +static void altera_iic_realize(DeviceState *dev, Error **errp) +{ + struct AlteraIIC *pv = ALTERA_IIC(dev); + + if (!pv->cpu) { + error_setg(errp, "altera,iic: CPU not connected"); + return; + } +} + +static void altera_iic_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->props = altera_iic_properties; + /* Reason: pointer property "cpu" */ + dc->cannot_instantiate_with_device_add_yet = true; + dc->realize = altera_iic_realize; +} + +static TypeInfo altera_iic_info = { + .name = "altera,iic", + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(AlteraIIC), + .instance_init = altera_iic_init, + .class_init = altera_iic_class_init, +}; + +static void altera_iic_register(void) +{ + type_register_static(&altera_iic_info); +} + +type_init(altera_iic_register)