From patchwork Wed Oct 5 13:35:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= X-Patchwork-Id: 9362925 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9BEE3600C8 for ; Wed, 5 Oct 2016 13:37:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C5012893D for ; Wed, 5 Oct 2016 13:37:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80BB22898A; Wed, 5 Oct 2016 13:37:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=2.0 tests=BAYES_00,HK_RANDOM_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9A8072893D for ; Wed, 5 Oct 2016 13:37:11 +0000 (UTC) Received: from localhost ([::1]:49205 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brmNi-0005af-MZ for patchwork-qemu-devel@patchwork.kernel.org; Wed, 05 Oct 2016 09:37:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47684) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brmN1-0005Sq-QI for qemu-devel@nongnu.org; Wed, 05 Oct 2016 09:36:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1brmMz-0005ww-4f for qemu-devel@nongnu.org; Wed, 05 Oct 2016 09:36:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46540) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brmMt-0005ug-0H; Wed, 05 Oct 2016 09:36:19 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 63BFC6A6CE; Wed, 5 Oct 2016 13:36:18 +0000 (UTC) Received: from potion (dhcp-1-247.brq.redhat.com [10.34.1.247]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with SMTP id u95DaEdY019640; Wed, 5 Oct 2016 09:36:15 -0400 Received: by potion (sSMTP sendmail emulation); Wed, 05 Oct 2016 15:36:14 +0200 From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= To: qemu-devel@nongnu.org Date: Wed, 5 Oct 2016 15:35:30 +0200 Message-Id: <20161005133530.5702-3-rkrcmar@redhat.com> In-Reply-To: <20161005133530.5702-1-rkrcmar@redhat.com> References: <20161005133530.5702-1-rkrcmar@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 05 Oct 2016 13:36:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/2] coccinelle: use object_new_with_class() in obvious cases X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Rob Herring , Igor Mitsyanko , Alexander Graf , Alistair Francis , Max Filippov , qemu-arm@nongnu.org, Paolo Bonzini , "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP object_new_with_class(class) does a better job than object_new(object_class_get_name(class)), because object_class_get_name() lost the class->type and object_new() looked it up again from the name. Manually changed vl.c to fit into 80 character line. Signed-off-by: Radim Krčmář Reviewed-by: Eduardo Habkost Reviewed-by: Alistair Francis --- hw/arm/exynos4210.c | 2 +- hw/arm/highbank.c | 2 +- hw/arm/integratorcp.c | 2 +- hw/arm/realview.c | 2 +- hw/arm/versatilepb.c | 2 +- hw/arm/vexpress.c | 2 +- hw/arm/xilinx_zynq.c | 2 +- qom/cpu.c | 2 +- scripts/coccinelle/object_new_with_class.cocci | 5 +++++ target-alpha/cpu.c | 2 +- target-i386/cpu.c | 2 +- target-m68k/helper.c | 2 +- target-s390x/cpu_models.c | 2 +- target-xtensa/helper.c | 2 +- vl.c | 4 ++-- 15 files changed, 20 insertions(+), 15 deletions(-) create mode 100644 scripts/coccinelle/object_new_with_class.cocci diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index be3c96d21ea3..6be8ef4b25d1 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -153,7 +153,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, assert(cpu_oc); for (n = 0; n < EXYNOS4210_NCPUS; n++) { - Object *cpuobj = object_new(object_class_get_name(cpu_oc)); + Object *cpuobj = object_new_with_class(cpu_oc); /* By default A9 CPUs have EL3 enabled. This board does not currently * support EL3 so the CPU EL3 property is disabled before realization. diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 80e5fd458bee..0a4eb83748d3 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -248,7 +248,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) Object *cpuobj; ARMCPU *cpu; - cpuobj = object_new(object_class_get_name(oc)); + cpuobj = object_new_with_class(oc); cpu = ARM_CPU(cpuobj); object_property_set_int(cpuobj, QEMU_PSCI_CONDUIT_SMC, diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 039812a3fd86..211abe1caae6 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -555,7 +555,7 @@ static void integratorcp_init(MachineState *machine) exit(1); } - cpuobj = object_new(object_class_get_name(cpu_oc)); + cpuobj = object_new_with_class(cpu_oc); /* By default ARM1176 CPUs have EL3 enabled. This board does not * currently support EL3 so the CPU EL3 property is disabled before diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8eafccaf1de8..e63fae0450d2 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -103,7 +103,7 @@ static void realview_init(MachineState *machine, } for (n = 0; n < smp_cpus; n++) { - Object *cpuobj = object_new(object_class_get_name(cpu_oc)); + Object *cpuobj = object_new_with_class(cpu_oc); /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board * does not currently support EL3 so the CPU EL3 property is disabled diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 8ae5392bcc16..ab54d94edb85 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -208,7 +208,7 @@ static void versatile_init(MachineState *machine, int board_id) exit(1); } - cpuobj = object_new(object_class_get_name(cpu_oc)); + cpuobj = object_new_with_class(cpu_oc); /* By default ARM1176 CPUs have EL3 enabled. This board does not * currently support EL3 so the CPU EL3 property is disabled before diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 58760f40ca22..41eb6df18d77 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -215,7 +215,7 @@ static void init_cpus(const char *cpu_model, const char *privdev, /* Create the actual CPUs */ for (n = 0; n < smp_cpus; n++) { - Object *cpuobj = object_new(object_class_get_name(cpu_oc)); + Object *cpuobj = object_new_with_class(cpu_oc); if (!secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 7dac20d67dce..181da39ca100 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -177,7 +177,7 @@ static void zynq_init(MachineState *machine) } cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model); - cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc))); + cpu = ARM_CPU(object_new_with_class(cpu_oc)); /* By default A9 CPUs have EL3 enabled. This board does not * currently support EL3 so the CPU EL3 property is disabled before diff --git a/qom/cpu.c b/qom/cpu.c index 484c49388d6d..9f9dc6e6a3d2 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -73,7 +73,7 @@ CPUState *cpu_generic_init(const char *typename, const char *cpu_model) goto out; } - cpu = CPU(object_new(object_class_get_name(oc))); + cpu = CPU(object_new_with_class(oc)); object_property_set_bool(OBJECT(cpu), true, "realized", &err); out: diff --git a/scripts/coccinelle/object_new_with_class.cocci b/scripts/coccinelle/object_new_with_class.cocci new file mode 100644 index 000000000000..2b1413675322 --- /dev/null +++ b/scripts/coccinelle/object_new_with_class.cocci @@ -0,0 +1,5 @@ +@@ +expression x; +@@ +- object_new(object_class_get_name(x)) ++ object_new_with_class(x) diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 6d01d7f75e9e..f89880451bcf 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -162,7 +162,7 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model) /* Default to ev67; no reason not to emulate insns by default. */ cpu_class = object_class_by_name(TYPE("ev67")); } - cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class))); + cpu = ALPHA_CPU(object_new_with_class(cpu_class)); object_property_set_bool(OBJECT(cpu), true, "realized", NULL); diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 13505ab156e0..9a4c6ec190cf 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2866,7 +2866,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp) APICCommonState *apic; ObjectClass *apic_class = OBJECT_CLASS(apic_get_class()); - cpu->apic_state = DEVICE(object_new(object_class_get_name(apic_class))); + cpu->apic_state = DEVICE(object_new_with_class(apic_class)); object_property_add_child(OBJECT(cpu), "lapic", OBJECT(cpu->apic_state), &error_abort); diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 89bbe6dfa6fc..bffbb26aba1c 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -110,7 +110,7 @@ M68kCPU *cpu_m68k_init(const char *cpu_model) if (oc == NULL) { return NULL; } - cpu = M68K_CPU(object_new(object_class_get_name(oc))); + cpu = M68K_CPU(object_new_with_class(oc)); env = &cpu->env; register_m68k_insns(env); diff --git a/target-s390x/cpu_models.c b/target-s390x/cpu_models.c index 3ff6a702f9af..3865fdc1c9ef 100644 --- a/target-s390x/cpu_models.c +++ b/target-s390x/cpu_models.c @@ -334,7 +334,7 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info, error_setg(errp, "The CPU definition '%s' requires KVM", info->name); return; } - obj = object_new(object_class_get_name(oc)); + obj = object_new_with_class(oc); cpu = S390_CPU(obj); if (!cpu->model) { diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 768b32c41724..7672a13521ea 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -124,7 +124,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model) return NULL; } - cpu = XTENSA_CPU(object_new(object_class_get_name(oc))); + cpu = XTENSA_CPU(object_new_with_class(oc)); env = &cpu->env; xtensa_irq_init(env); diff --git a/vl.c b/vl.c index f3abd99eb2f9..df15bd5bf883 100644 --- a/vl.c +++ b/vl.c @@ -4076,8 +4076,8 @@ int main(int argc, char **argv, char **envp) } #endif - current_machine = MACHINE(object_new(object_class_get_name( - OBJECT_CLASS(machine_class)))); + current_machine = MACHINE( + object_new_with_class(OBJECT_CLASS(machine_class))); if (machine_help_func(qemu_get_machine_opts(), current_machine)) { exit(0); }