| Message ID | 20161227231156.22745-1-Sergio.G.DelReal@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 27 December 2016 at 23:11, Sergio Andrés Gómez Del Real <sergio.g.delreal@gmail.com> wrote: > The patch fixes dead code in pl080_read() and pl080_write() as reported > in bug #1637974. According to ARM's official Technical Reference Manual, > offsets handled by the switch statement are 0x100, 0x104, 0x108, 0x10C > and 0x110, so the solution suggested by the guy who reported the bug is > right. > > Signed-off-by: Sergio Andrés Gómez Del Real <Sergio.G.DelReal@gmail.com> > --- > hw/dma/pl080.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c > index 7724c93..3b0c20b 100644 > --- a/hw/dma/pl080.c > +++ b/hw/dma/pl080.c > @@ -255,7 +255,7 @@ static uint64_t pl080_read(void *opaque, hwaddr offset, > i = (offset & 0xe0) >> 5; > if (i >= s->nchannels) > goto bad_offset; > - switch (offset >> 2) { > + switch ((offset - 0x100) >> 2) { > case 0: /* SrcAddr */ > return s->chan[i].src; > case 1: /* DestAddr */ > @@ -316,7 +316,7 @@ static void pl080_write(void *opaque, hwaddr offset, > i = (offset & 0xe0) >> 5; > if (i >= s->nchannels) > goto bad_offset; > - switch (offset >> 2) { > + switch ((offset - 0x100) >> 2) { > case 0: /* SrcAddr */ > s->chan[i].src = value; > break; > -- > 2.10.2 Looking at the TRM, I don't think this fix is correct. The switches are intended to handle all of the DMACC* DMA channel registers: 0x100 DMACC0SrcAddr 0x104 DMACC0DestAddr 0x108 DMACC0LLI 0x10C DMACC0Control 0x110 DMACC0Configuration 0x120 DMACC1SrcAddr 0x124 DMACC1DestAddr etc up to 0x1F0 DMACC7Configuration and what the switch is trying to do is figure out which of SrcAddr/DestAddr/LLI/Control/Configuration we're looking at (it then uses the correctly calculated 'i' index to pick the right index into the s->chan[] array for DMACC0 vs DMACC1 etc). So the correct thing to switch on here is (offset & 0x1f) >> 2. thanks -- PMM
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 7724c93..3b0c20b 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -255,7 +255,7 @@ static uint64_t pl080_read(void *opaque, hwaddr offset, i = (offset & 0xe0) >> 5; if (i >= s->nchannels) goto bad_offset; - switch (offset >> 2) { + switch ((offset - 0x100) >> 2) { case 0: /* SrcAddr */ return s->chan[i].src; case 1: /* DestAddr */ @@ -316,7 +316,7 @@ static void pl080_write(void *opaque, hwaddr offset, i = (offset & 0xe0) >> 5; if (i >= s->nchannels) goto bad_offset; - switch (offset >> 2) { + switch ((offset - 0x100) >> 2) { case 0: /* SrcAddr */ s->chan[i].src = value; break;
The patch fixes dead code in pl080_read() and pl080_write() as reported in bug #1637974. According to ARM's official Technical Reference Manual, offsets handled by the switch statement are 0x100, 0x104, 0x108, 0x10C and 0x110, so the solution suggested by the guy who reported the bug is right. Signed-off-by: Sergio Andrés Gómez Del Real <Sergio.G.DelReal@gmail.com> --- hw/dma/pl080.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)