From patchwork Tue Jan 17 08:56:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cornelia Huck X-Patchwork-Id: 9520193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 121666043D for ; Tue, 17 Jan 2017 08:58:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0588B284FB for ; Tue, 17 Jan 2017 08:58:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE27128507; Tue, 17 Jan 2017 08:58:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00 autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B786628503 for ; Tue, 17 Jan 2017 08:57:54 +0000 (UTC) Received: from localhost ([::1]:33610 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cTPaJ-0002PT-HM for patchwork-qemu-devel@patchwork.kernel.org; Tue, 17 Jan 2017 03:57:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48957) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cTPZi-0002Fw-8L for qemu-devel@nongnu.org; Tue, 17 Jan 2017 03:57:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cTPZd-00086G-C2 for qemu-devel@nongnu.org; Tue, 17 Jan 2017 03:57:06 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:35956 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cTPZd-00085m-6G for qemu-devel@nongnu.org; Tue, 17 Jan 2017 03:57:01 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v0H8rVxW044384 for ; Tue, 17 Jan 2017 03:57:00 -0500 Received: from e06smtp11.uk.ibm.com (e06smtp11.uk.ibm.com [195.75.94.107]) by mx0a-001b2d01.pphosted.com with ESMTP id 2814x1pchb-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 17 Jan 2017 03:57:00 -0500 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 17 Jan 2017 08:56:52 -0000 Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by d06dlp03.portsmouth.uk.ibm.com (Postfix) with ESMTP id 390011B0806E; Tue, 17 Jan 2017 08:59:36 +0000 (GMT) Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v0H8uqqO3146234; Tue, 17 Jan 2017 08:56:52 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id ED41252052; Tue, 17 Jan 2017 07:55:19 +0000 (GMT) Received: from gondolin.boeblingen.de.ibm.com (unknown [9.152.224.55]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTPS id 9AE2452043; Tue, 17 Jan 2017 07:55:19 +0000 (GMT) From: Cornelia Huck To: peter.maydell@linaro.org Date: Tue, 17 Jan 2017 09:56:37 +0100 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170117085645.4267-1-cornelia.huck@de.ibm.com> References: <20170117085645.4267-1-cornelia.huck@de.ibm.com> X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17011708-0040-0000-0000-000003319B3A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17011708-0041-0000-0000-00001E924697 Message-Id: <20170117085645.4267-5-cornelia.huck@de.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-01-17_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=3 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1701170122 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PULL 04/12] s390x/pci: make S390PCIIOMMU inherit Object X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yi Min Zhao , agraf@suse.de, qemu-devel@nongnu.org, borntraeger@de.ibm.com, jfrei@linux.vnet.ibm.com, Cornelia Huck Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Yi Min Zhao Currently S390PCIIOMMU is a normal struct. Let's make it inherit Object in order to take advantage of QOM. In addition, we move some stuff related to IOMMU from S390PCIBusDevice to S390PCIIOMMU. Signed-off-by: Yi Min Zhao Acked-by: Pierre Morel Signed-off-by: Cornelia Huck --- hw/s390x/s390-pci-bus.c | 52 +++++++++++++++++++++++++++++------------------- hw/s390x/s390-pci-bus.h | 20 ++++++++++++------- hw/s390x/s390-pci-inst.c | 50 ++++++++++++++++++++++++---------------------- hw/s390x/s390-pci-inst.h | 2 +- 4 files changed, 71 insertions(+), 53 deletions(-) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 63f6248f1d..11244fc93c 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -187,8 +187,8 @@ void s390_pci_sclp_deconfigure(SCCB *sccb) if (pbdev->summary_ind) { pci_dereg_irqs(pbdev); } - if (pbdev->iommu_enabled) { - pci_dereg_ioat(pbdev); + if (pbdev->iommu->enabled) { + pci_dereg_ioat(pbdev->iommu); } pbdev->state = ZPCI_FS_STANDBY; rc = SCLP_RC_NORMAL_COMPLETION; @@ -377,12 +377,12 @@ out: return pte; } -static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr, +static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr, bool is_write) { uint64_t pte; uint32_t flags; - S390PCIBusDevice *pbdev = container_of(iommu, S390PCIBusDevice, iommu_mr); + S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); IOMMUTLBEntry ret = { .target_as = &address_space_memory, .iova = 0, @@ -391,10 +391,10 @@ static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr, .perm = IOMMU_NONE, }; - switch (pbdev->state) { + switch (iommu->pbdev->state) { case ZPCI_FS_ENABLED: case ZPCI_FS_BLOCKED: - if (!pbdev->iommu_enabled) { + if (!iommu->enabled) { return ret; } break; @@ -404,11 +404,11 @@ static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr, DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); - if (addr < pbdev->pba || addr > pbdev->pal) { + if (addr < iommu->pba || addr > iommu->pal) { return ret; } - pte = s390_guest_io_table_walk(s390_pci_get_table_origin(pbdev->g_iota), + pte = s390_guest_io_table_walk(s390_pci_get_table_origin(iommu->g_iota), addr); if (!pte) { return ret; @@ -503,19 +503,21 @@ static const MemoryRegionOps s390_msi_ctrl_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -void s390_pci_iommu_enable(S390PCIBusDevice *pbdev) +void s390_pci_iommu_enable(S390PCIIOMMU *iommu) { - memory_region_init_iommu(&pbdev->iommu_mr, OBJECT(&pbdev->iommu->mr), - &s390_iommu_ops, "iommu-s390", pbdev->pal + 1); - memory_region_add_subregion(&pbdev->iommu->mr, 0, &pbdev->iommu_mr); - pbdev->iommu_enabled = true; + char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); + memory_region_init_iommu(&iommu->iommu_mr, OBJECT(&iommu->mr), + &s390_iommu_ops, name, iommu->pal + 1); + iommu->enabled = true; + memory_region_add_subregion(&iommu->mr, 0, &iommu->iommu_mr); + g_free(name); } -void s390_pci_iommu_disable(S390PCIBusDevice *pbdev) +void s390_pci_iommu_disable(S390PCIIOMMU *iommu) { - memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->iommu_mr); - object_unparent(OBJECT(&pbdev->iommu_mr)); - pbdev->iommu_enabled = false; + iommu->enabled = false; + memory_region_del_subregion(&iommu->mr, &iommu->iommu_mr); + object_unparent(OBJECT(&iommu->iommu_mr)); } static void s390_pcihost_init_as(S390pciState *s) @@ -660,6 +662,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev, pbdev->pdev = pdev; pbdev->iommu = s->iommu[PCI_SLOT(pdev->devfn)]; + pbdev->iommu->pbdev = pbdev; pbdev->state = ZPCI_FS_STANDBY; s390_pci_msix_init(pbdev); @@ -692,8 +695,8 @@ static void s390_pcihost_timer_cb(void *opaque) if (pbdev->summary_ind) { pci_dereg_irqs(pbdev); } - if (pbdev->iommu_enabled) { - pci_dereg_ioat(pbdev); + if (pbdev->iommu->enabled) { + pci_dereg_ioat(pbdev->iommu); } pbdev->state = ZPCI_FS_STANDBY; @@ -877,8 +880,8 @@ static void s390_pci_device_reset(DeviceState *dev) if (pbdev->summary_ind) { pci_dereg_irqs(pbdev); } - if (pbdev->iommu_enabled) { - pci_dereg_ioat(pbdev); + if (pbdev->iommu->enabled) { + pci_dereg_ioat(pbdev->iommu); } pbdev->fmb_addr = 0; @@ -944,11 +947,18 @@ static const TypeInfo s390_pci_device_info = { .class_init = s390_pci_device_class_init, }; +static TypeInfo s390_pci_iommu_info = { + .name = TYPE_S390_PCI_IOMMU, + .parent = TYPE_OBJECT, + .instance_size = sizeof(S390PCIIOMMU), +}; + static void s390_pci_register_types(void) { type_register_static(&s390_pcihost_info); type_register_static(&s390_pcibus_info); type_register_static(&s390_pci_device_info); + type_register_static(&s390_pci_iommu_info); } type_init(s390_pci_register_types) diff --git a/hw/s390x/s390-pci-bus.h b/hw/s390x/s390-pci-bus.h index 7f2701301e..1d05c1a92e 100644 --- a/hw/s390x/s390-pci-bus.h +++ b/hw/s390x/s390-pci-bus.h @@ -23,6 +23,7 @@ #define TYPE_S390_PCI_HOST_BRIDGE "s390-pcihost" #define TYPE_S390_PCI_BUS "s390-pcibus" #define TYPE_S390_PCI_DEVICE "zpci" +#define TYPE_S390_PCI_IOMMU "s390-pci-iommu" #define FH_MASK_ENABLE 0x80000000 #define FH_MASK_INSTANCE 0x7f000000 #define FH_MASK_SHM 0x00ff0000 @@ -42,6 +43,8 @@ OBJECT_CHECK(S390PCIBus, (obj), TYPE_S390_PCI_BUS) #define S390_PCI_DEVICE(obj) \ OBJECT_CHECK(S390PCIBusDevice, (obj), TYPE_S390_PCI_DEVICE) +#define S390_PCI_IOMMU(obj) \ + OBJECT_CHECK(S390PCIIOMMU, (obj), TYPE_S390_PCI_IOMMU) #define HP_EVENT_TO_CONFIGURED 0x0301 #define HP_EVENT_RESERVED_TO_STANDBY 0x0302 @@ -258,24 +261,28 @@ typedef struct S390MsixInfo { uint32_t pba_offset; } S390MsixInfo; +typedef struct S390PCIBusDevice S390PCIBusDevice; typedef struct S390PCIIOMMU { + Object parent_obj; + S390PCIBusDevice *pbdev; AddressSpace as; MemoryRegion mr; + MemoryRegion iommu_mr; + bool enabled; + uint64_t g_iota; + uint64_t pba; + uint64_t pal; } S390PCIIOMMU; typedef struct S390PCIBusDevice { DeviceState qdev; PCIDevice *pdev; ZpciState state; - bool iommu_enabled; char *target; uint16_t uid; uint32_t fh; uint32_t fid; bool fid_defined; - uint64_t g_iota; - uint64_t pba; - uint64_t pal; uint64_t fmb_addr; uint8_t isc; uint16_t noi; @@ -283,7 +290,6 @@ typedef struct S390PCIBusDevice { S390MsixInfo msix; AdapterRoutes routes; S390PCIIOMMU *iommu; - MemoryRegion iommu_mr; MemoryRegion msix_notify_mr; IndAddr *summary_ind; IndAddr *indicator; @@ -306,8 +312,8 @@ int chsc_sei_nt2_get_event(void *res); int chsc_sei_nt2_have_event(void); void s390_pci_sclp_configure(SCCB *sccb); void s390_pci_sclp_deconfigure(SCCB *sccb); -void s390_pci_iommu_enable(S390PCIBusDevice *pbdev); -void s390_pci_iommu_disable(S390PCIBusDevice *pbdev); +void s390_pci_iommu_enable(S390PCIIOMMU *iommu); +void s390_pci_iommu_disable(S390PCIIOMMU *iommu); void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, uint64_t faddr, uint32_t e); S390PCIBusDevice *s390_pci_find_dev_by_idx(uint32_t idx); diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 0864d9be12..7dbdb0c6d6 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -555,6 +555,7 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2) CPUS390XState *env = &cpu->env; uint32_t fh; S390PCIBusDevice *pbdev; + S390PCIIOMMU *iommu; hwaddr start, end; IOMMUTLBEntry entry; MemoryRegion *mr; @@ -597,7 +598,8 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2) break; } - if (!pbdev->g_iota) { + iommu = pbdev->iommu; + if (!iommu->g_iota) { pbdev->state = ZPCI_FS_ERROR; setcc(cpu, ZPCI_PCI_LS_ERR); s390_set_status_code(env, r1, ZPCI_PCI_ST_INSUF_RES); @@ -606,7 +608,7 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2) goto out; } - if (end < pbdev->pba || start > pbdev->pal) { + if (end < iommu->pba || start > iommu->pal) { pbdev->state = ZPCI_FS_ERROR; setcc(cpu, ZPCI_PCI_LS_ERR); s390_set_status_code(env, r1, ZPCI_PCI_ST_INSUF_RES); @@ -615,7 +617,7 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2) goto out; } - mr = &pbdev->iommu_mr; + mr = &iommu->iommu_mr; while (start < end) { entry = mr->iommu_ops->translate(mr, start, 0); @@ -783,7 +785,7 @@ int pci_dereg_irqs(S390PCIBusDevice *pbdev) return 0; } -static int reg_ioat(CPUS390XState *env, S390PCIBusDevice *pbdev, ZpciFib fib) +static int reg_ioat(CPUS390XState *env, S390PCIIOMMU *iommu, ZpciFib fib) { uint64_t pba = ldq_p(&fib.pba); uint64_t pal = ldq_p(&fib.pal); @@ -803,21 +805,21 @@ static int reg_ioat(CPUS390XState *env, S390PCIBusDevice *pbdev, ZpciFib fib) return -EINVAL; } - pbdev->pba = pba; - pbdev->pal = pal; - pbdev->g_iota = g_iota; + iommu->pba = pba; + iommu->pal = pal; + iommu->g_iota = g_iota; - s390_pci_iommu_enable(pbdev); + s390_pci_iommu_enable(iommu); return 0; } -void pci_dereg_ioat(S390PCIBusDevice *pbdev) +void pci_dereg_ioat(S390PCIIOMMU *iommu) { - s390_pci_iommu_disable(pbdev); - pbdev->pba = 0; - pbdev->pal = 0; - pbdev->g_iota = 0; + s390_pci_iommu_disable(iommu); + iommu->pba = 0; + iommu->pal = 0; + iommu->g_iota = 0; } int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar) @@ -892,10 +894,10 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar) if (dmaas != 0) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL); - } else if (pbdev->iommu_enabled) { + } else if (pbdev->iommu->enabled) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE); - } else if (reg_ioat(env, pbdev, fib)) { + } else if (reg_ioat(env, pbdev->iommu, fib)) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_INSUF_RES); } @@ -904,23 +906,23 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar) if (dmaas != 0) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL); - } else if (!pbdev->iommu_enabled) { + } else if (!pbdev->iommu->enabled) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE); } else { - pci_dereg_ioat(pbdev); + pci_dereg_ioat(pbdev->iommu); } break; case ZPCI_MOD_FC_REREG_IOAT: if (dmaas != 0) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL); - } else if (!pbdev->iommu_enabled) { + } else if (!pbdev->iommu->enabled) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE); } else { - pci_dereg_ioat(pbdev); - if (reg_ioat(env, pbdev, fib)) { + pci_dereg_ioat(pbdev->iommu); + if (reg_ioat(env, pbdev->iommu, fib)) { cc = ZPCI_PCI_LS_ERR; s390_set_status_code(env, r1, ZPCI_MOD_ST_INSUF_RES); } @@ -1015,7 +1017,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar) fib.fc |= 0x40; case ZPCI_FS_ENABLED: fib.fc |= 0x80; - if (pbdev->iommu_enabled) { + if (pbdev->iommu->enabled) { fib.fc |= 0x10; } if (!(fh & FH_MASK_ENABLE)) { @@ -1028,9 +1030,9 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar) return 0; } - stq_p(&fib.pba, pbdev->pba); - stq_p(&fib.pal, pbdev->pal); - stq_p(&fib.iota, pbdev->g_iota); + stq_p(&fib.pba, pbdev->iommu->pba); + stq_p(&fib.pal, pbdev->iommu->pal); + stq_p(&fib.iota, pbdev->iommu->g_iota); stq_p(&fib.aibv, pbdev->routes.adapter.ind_addr); stq_p(&fib.aisb, pbdev->routes.adapter.summary_addr); stq_p(&fib.fmb_addr, pbdev->fmb_addr); diff --git a/hw/s390x/s390-pci-inst.h b/hw/s390x/s390-pci-inst.h index 23f4bfa0ed..94a959f91c 100644 --- a/hw/s390x/s390-pci-inst.h +++ b/hw/s390x/s390-pci-inst.h @@ -292,7 +292,7 @@ typedef struct ZpciFib { } QEMU_PACKED ZpciFib; int pci_dereg_irqs(S390PCIBusDevice *pbdev); -void pci_dereg_ioat(S390PCIBusDevice *pbdev); +void pci_dereg_ioat(S390PCIIOMMU *iommu); int clp_service_call(S390CPU *cpu, uint8_t r2); int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2); int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2);