| Message ID | 20170127081510.11805-1-rth@twiddle.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jan 27, 2017 at 9:15 AM, Richard Henderson <rth@twiddle.net> wrote: > Fixes the booting of ss20 roms. Mike, can you please test this fix? > Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Initially Reported-by: Michael Russo <mike@papersolve.com> > Signed-off-by: Richard Henderson <rth@twiddle.net> > --- > target/sparc/translate.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > > diff --git a/target/sparc/translate.c b/target/sparc/translate.c > index 655060c..aa6734d 100644 > --- a/target/sparc/translate.c > +++ b/target/sparc/translate.c > @@ -2448,8 +2448,31 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn) > gen_ldstub(dc, dst, addr, da.mem_idx); > break; > default: > - /* ??? Should be DAE_invalid_asi. */ > - gen_exception(dc, TT_DATA_ACCESS); > + /* ??? In theory, this should be raise DAE_invalid_asi. > + But the SS-20 roms do ldstuba [%l0] #ASI_M_CTL, %o1. */ > + if (parallel_cpus) { > + gen_helper_exit_atomic(cpu_env); > + } else { > + TCGv_i32 r_asi = tcg_const_i32(da.asi); > + TCGv_i32 r_mop = tcg_const_i32(MO_UB); > + TCGv_i64 s64, t64; > + > + save_state(dc); > + t64 = tcg_temp_new_i64(); > + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); > + > + s64 = tcg_const_i64(0xff); > + gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop); > + tcg_temp_free_i64(s64); > + tcg_temp_free_i32(r_mop); > + tcg_temp_free_i32(r_asi); > + > + tcg_gen_trunc_i64_tl(dst, t64); > + tcg_temp_free_i64(t64); > + > + /* End the TB. */ > + dc->npc = DYNAMIC_PC; > + } > break; > } > } > -- > 2.9.3 >
On 27/01/17 12:57, Artyom Tarasenko wrote: > On Fri, Jan 27, 2017 at 9:15 AM, Richard Henderson <rth@twiddle.net> wrote: >> Fixes the booting of ss20 roms. > > Mike, can you please test this fix? > >> Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> > > Initially Reported-by: Michael Russo <mike@papersolve.com> > >> Signed-off-by: Richard Henderson <rth@twiddle.net> Thanks Richard. I've given this a quick spin around my various SPARC images and it looks good with no regressions, so: Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Also when resubmitting with the updated Reported-by above, can we also CC qemu-stable to get this into the next 2.8 release? ATB, Mark.
diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 655060c..aa6734d 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2448,8 +2448,31 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn) gen_ldstub(dc, dst, addr, da.mem_idx); break; default: - /* ??? Should be DAE_invalid_asi. */ - gen_exception(dc, TT_DATA_ACCESS); + /* ??? In theory, this should be raise DAE_invalid_asi. + But the SS-20 roms do ldstuba [%l0] #ASI_M_CTL, %o1. */ + if (parallel_cpus) { + gen_helper_exit_atomic(cpu_env); + } else { + TCGv_i32 r_asi = tcg_const_i32(da.asi); + TCGv_i32 r_mop = tcg_const_i32(MO_UB); + TCGv_i64 s64, t64; + + save_state(dc); + t64 = tcg_temp_new_i64(); + gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop); + + s64 = tcg_const_i64(0xff); + gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop); + tcg_temp_free_i64(s64); + tcg_temp_free_i32(r_mop); + tcg_temp_free_i32(r_asi); + + tcg_gen_trunc_i64_tl(dst, t64); + tcg_temp_free_i64(t64); + + /* End the TB. */ + dc->npc = DYNAMIC_PC; + } break; } }
Fixes the booting of ss20 roms. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net> --- target/sparc/translate.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-)