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[73.207.178.95]) by smtp.gmail.com with ESMTPSA id x26sm76177ywj.42.2017.02.09.17.45.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 17:45:19 -0800 (PST) From: Pranith Kumar To: Paolo Bonzini , Peter Crosthwaite , Richard Henderson , qemu-devel@nongnu.org (open list:Overall) Date: Thu, 9 Feb 2017 20:45:19 -0500 Message-Id: <20170210014519.12413-1-bobby.prani@gmail.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:4002:c09::241 Subject: [Qemu-devel] [PATCH] tcg: handle EXCP_ATOMIC exception properly X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The current method of executing atomic code in a guest uses cpu_exec_step_atomic() from the outermost loop. This causes an abort() when single stepping over atomic code since debug exception longjmp will point to the the setlongjmp in cpu_exec(). Another issue with this mechanism is that the flags which were set in atomic execution will be lost since we do not call cpu_exec_enter(). The following patch moves atomic exception handling to the exception handler where all these issues are taken care of. The change in start_exclusive() is necessary since now the cpu in atomic execution will have its running flag set, but we do not want to count it as pending. Thanks to Alex for helping me debug the issue. CC: Alex Bennée CC: Richard Henderson CC: Paolo Bonzini Signed-off-by: Pranith Kumar --- cpu-exec.c | 2 ++ cpus-common.c | 2 +- cpus.c | 4 ---- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index b0ddada8c1..dceacfc5dd 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -427,6 +427,8 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) *ret = cpu->exception_index; if (*ret == EXCP_DEBUG) { cpu_handle_debug_exception(cpu); + } else if (*ret == EXCP_ATOMIC) { + cpu_exec_step_atomic(cpu); } cpu->exception_index = -1; return true; diff --git a/cpus-common.c b/cpus-common.c index 59f751ecf9..7b859752ea 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -192,7 +192,7 @@ void start_exclusive(void) smp_mb(); running_cpus = 0; CPU_FOREACH(other_cpu) { - if (atomic_read(&other_cpu->running)) { + if (atomic_read(&other_cpu->running) && !qemu_cpu_is_self(other_cpu)) { other_cpu->has_waiter = true; running_cpus++; qemu_cpu_kick(other_cpu); diff --git a/cpus.c b/cpus.c index e1b82bcd49..981f23d52b 100644 --- a/cpus.c +++ b/cpus.c @@ -1461,10 +1461,6 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) */ g_assert(cpu->halted); break; - case EXCP_ATOMIC: - qemu_mutex_unlock_iothread(); - cpu_exec_step_atomic(cpu); - qemu_mutex_lock_iothread(); default: /* Ignore everything else? */ break;