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Sat, 04 Mar 2017 10:57:24 -0800 (PST) Received: from yoga.lan ([138.117.48.226]) by smtp.gmail.com with ESMTPSA id k8sm10048006qke.54.2017.03.04.10.57.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 04 Mar 2017 10:57:24 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Aurelien Jarno , Yongbok Kim Date: Sat, 4 Mar 2017 15:56:49 -0300 Message-Id: <20170304185652.10675-3-f4bug@amsat.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170304185652.10675-1-f4bug@amsat.org> References: <20170304185652.10675-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c09::242 Subject: [Qemu-devel] [PATCH 2/5] target-mips: remove old & unuseful comments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yongbok Kim --- target/mips/translate.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 8b4a072ecb..1fe0ff39f2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5137,7 +5137,6 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld32s_tl(arg, cpu_env, @@ -5791,7 +5790,6 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(arg, cpu_env, @@ -6454,7 +6452,6 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(arg, cpu_env, @@ -7092,7 +7089,6 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) // gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; -// break; case 2: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(arg, cpu_env,