From patchwork Mon Mar 13 19:55:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Blake X-Patchwork-Id: 9622007 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8614560244 for ; Mon, 13 Mar 2017 20:03:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7B34B26E56 for ; Mon, 13 Mar 2017 20:03:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7018227BE5; Mon, 13 Mar 2017 20:03:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0556926E56 for ; Mon, 13 Mar 2017 20:03:45 +0000 (UTC) Received: from localhost ([::1]:54137 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWC0-0006t0-3m for patchwork-qemu-devel@patchwork.kernel.org; Mon, 13 Mar 2017 16:03:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4l-0000pH-2Y for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4j-0002aQ-R1 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43352) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4j-0002a1-J1 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:13 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 873DFC0546E3 for ; Mon, 13 Mar 2017 19:56:13 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id E32C32D655; Mon, 13 Mar 2017 19:56:12 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:37 -0500 Message-Id: <20170313195547.21466-21-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:13 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 20/30] trace: Fix parameter types in hw/misc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/misc/trace-events | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 0cc556c..71c8e3b 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -1,13 +1,13 @@ # See docs/tracing.txt for syntax documentation. # hw/misc/eccmemctl.c -ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" -ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" -ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" -ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" -ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" -ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" -ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" +ecc_mem_writel_mer(uint64_t val) "Write memory enable %08" PRIx64 +ecc_mem_writel_mdr(uint64_t val) "Write memory delay %08" PRIx64 +ecc_mem_writel_mfsr(uint64_t val) "Write memory fault status %08" PRIx64 +ecc_mem_writel_vcr(uint64_t val) "Write slot configuration %08" PRIx64 +ecc_mem_writel_dr(uint64_t val) "Write diagnostic %08" PRIx64 +ecc_mem_writel_ecr0(uint64_t val) "Write event count 1 %08" PRIx64 +ecc_mem_writel_ecr1(uint64_t val) "Write event count 2 %08" PRIx64 ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" @@ -17,39 +17,39 @@ ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" -ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" +ecc_diag_mem_writeb(uint64_t addr, uint64_t val) "Write diagnostic %"PRId64" = %02" PRIx64 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" # hw/misc/slavio_misc.c slavio_misc_update_irq_raise(void) "Raise IRQ" slavio_misc_update_irq_lower(void) "Lower IRQ" slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" -slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" +slavio_cfg_mem_writeb(uint64_t val) "Write config %02" PRIx64 slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" -slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" +slavio_diag_mem_writeb(uint64_t val) "Write diag %02" PRIx64 slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" -slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" +slavio_mdm_mem_writeb(uint64_t val) "Write modem control %02" PRIx64 slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" -slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" +slavio_aux1_mem_writeb(uint64_t val) "Write aux1 %02" PRIx64 slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" -slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" +slavio_aux2_mem_writeb(uint64_t val) "Write aux2 %02" PRIx64 slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" -apc_mem_writeb(uint32_t val) "Write power management %02x" +apc_mem_writeb(uint64_t val) "Write power management %02" PRIx64 apc_mem_readb(uint32_t ret) "Read power management %02x" -slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" +slavio_sysctrl_mem_writel(uint64_t val) "Write system control %08" PRIx64 slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" -slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" +slavio_led_mem_writew(uint64_t val) "Write diagnostic LED %04" PRIx64 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" # hw/misc/milkymist-hpdmc.c -milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" -milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" +milkymist_hpdmc_memory_read(hwaddr addr, uint32_t value) "addr=%08" HWADDR_PRIx " value=%08x" +milkymist_hpdmc_memory_write(hwaddr addr, uint64_t value) "addr=%08" HWADDR_PRIx " value=%08" PRIx64 # hw/misc/milkymist-pfpu.c -milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" -milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" -milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" +milkymist_pfpu_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_PRIx " value %08x" +milkymist_pfpu_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR_PRIx " value %08" PRIx64 +milkymist_pfpu_vectout(uint32_t a, uint32_t b, hwaddr dma_ptr) "a %08x b %08x dma_ptr %08" HWADDR_PRIx milkymist_pfpu_pulse_irq(void) "Pulse IRQ" # hw/misc/aspeed_scu.c -aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 +aspeed_scu_write(uint64_t offset, unsigned size, uint64_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx64