From patchwork Fri Apr 28 12:56:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luc MICHEL X-Patchwork-Id: 9704745 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 42FBC60225 for ; Fri, 28 Apr 2017 13:42:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32B95285E7 for ; Fri, 28 Apr 2017 13:42:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2420F2860B; Fri, 28 Apr 2017 13:42:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 56433285E7 for ; Fri, 28 Apr 2017 13:42:42 +0000 (UTC) Received: from localhost ([::1]:37173 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d46AT-0001nP-I7 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 28 Apr 2017 09:42:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48008) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d45Sa-0005Ox-1j for qemu-devel@nongnu.org; Fri, 28 Apr 2017 08:57:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d45SU-0001Fn-JY for qemu-devel@nongnu.org; Fri, 28 Apr 2017 08:57:20 -0400 Received: from bee.antfield.fr ([188.165.75.195]:54724) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d45SO-0001Bl-7O; Fri, 28 Apr 2017 08:57:08 -0400 From: Luc MICHEL To: qemu-devel@nongnu.org Date: Fri, 28 Apr 2017 14:56:32 +0200 Message-Id: <20170428125632.5704-2-luc.michel@git.antfield.fr> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20170428125632.5704-1-luc.michel@git.antfield.fr> References: <20170428125632.5704-1-luc.michel@git.antfield.fr> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.75.195 X-Mailman-Approved-At: Fri, 28 Apr 2017 09:41:34 -0400 Subject: [Qemu-devel] [PATCH 1/1] target/arm: add data cache invalidation cp15 instruction to cortex-r5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-trivial@nongnu.org, Peter Maydell , qemu-arm@nongnu.org, Luc MICHEL Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The cp15, CRn=15, opc1=0, CRm=5, opc2=0 instruction invalidates all the data cache on the cortex-r5. Implementing it as a NOP. Signed-off-by: Luc MICHEL --- target/arm/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b357aee778..47687a40c4 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1062,6 +1062,8 @@ static const ARMCPRegInfo cortexr5_cp_reginfo[] = { .access = PL1_RW, .type = ARM_CP_CONST }, { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1, .access = PL1_RW, .type = ARM_CP_CONST }, + { .name = "DCACHE_INVAL", .cp = 15, .opc1 = 0, .crn = 15, .crm = 5, + .opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP }, REGINFO_SENTINEL };