From patchwork Sat May 6 11:14:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 9714613 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9D0886038F for ; Sat, 6 May 2017 11:18:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A039285FD for ; Sat, 6 May 2017 11:18:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6F2BC286B3; Sat, 6 May 2017 11:18:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0C55128607 for ; Sat, 6 May 2017 11:18:51 +0000 (UTC) Received: from localhost ([::1]:50909 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d6xjf-0005fZ-5C for patchwork-qemu-devel@patchwork.kernel.org; Sat, 06 May 2017 07:18:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50838) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d6xff-00030K-Ie for qemu-devel@nongnu.org; Sat, 06 May 2017 07:14:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d6xfe-0003uh-ES for qemu-devel@nongnu.org; Sat, 06 May 2017 07:14:43 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:39992) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d6xfe-0003u2-89 for qemu-devel@nongnu.org; Sat, 06 May 2017 07:14:42 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1d6xfd-0008Mw-1J; Sat, 06 May 2017 13:14:41 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1d6xfb-0003Hb-OE; Sat, 06 May 2017 13:14:39 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sat, 6 May 2017 13:14:19 +0200 Message-Id: <20170506111431.12548-3-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170506111431.12548-1-aurelien@aurel32.net> References: <20170506111431.12548-1-aurelien@aurel32.net> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH v2 02/14] target/sh4: get rid of DELAY_SLOT_CLEARME X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Now that ctx->flags has been split, it becomes clear that DELAY_SLOT_CLEARME has not impact on the code generation: in both case ctx->envflags is cleared, either by clearing all the flags, or by setting it to 0. This is left-over from pre-TCG era. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- target/sh4/cpu.h | 3 +-- target/sh4/helper.c | 2 -- target/sh4/translate.c | 17 +++++------------ 3 files changed, 6 insertions(+), 16 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index cad8989f7e..9445cc779f 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -93,7 +93,6 @@ #define DELAY_SLOT (1 << 0) #define DELAY_SLOT_CONDITIONAL (1 << 1) #define DELAY_SLOT_TRUE (1 << 2) -#define DELAY_SLOT_CLEARME (1 << 3) /* The dynamic value of the DELAY_SLOT_TRUE flag determines whether the jump * after the delay slot should be taken or not. It is calculated from SR_T. * @@ -384,7 +383,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, *pc = env->pc; *cs_base = 0; *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL - | DELAY_SLOT_TRUE | DELAY_SLOT_CLEARME)) /* Bits 0- 3 */ + | DELAY_SLOT_TRUE)) /* Bits 0- 2 */ | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */ | (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */ | (env->sr & (1u << SR_FD)) /* Bit 15 */ diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 036c5ca56c..71bb49a670 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -170,8 +170,6 @@ void superh_cpu_do_interrupt(CPUState *cs) /* Clear flags for exception/interrupt routine. */ env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL | DELAY_SLOT_TRUE); } - if (env->flags & DELAY_SLOT_CLEARME) - env->flags = 0; if (do_exp) { env->expevt = cs->exception_index; diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 6b526a02f2..d84a7a2e6e 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1804,15 +1804,9 @@ static void decode_opc(DisasContext * ctx) _decode_opc(ctx); if (old_flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { - if (ctx->envflags & DELAY_SLOT_CLEARME) { - gen_store_flags(0); - } else { - /* go out of the delay slot */ - uint32_t new_flags = ctx->envflags; - new_flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL); - gen_store_flags(new_flags); - } - ctx->envflags = 0; + /* go out of the delay slot */ + ctx->envflags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL); + gen_store_flags(ctx->envflags); ctx->bstate = BS_BRANCH; if (old_flags & DELAY_SLOT_CONDITIONAL) { gen_delayed_conditional_jump(ctx); @@ -1840,8 +1834,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) pc_start = tb->pc; ctx.pc = pc_start; ctx.tbflags = (uint32_t)tb->flags; - ctx.envflags = tb->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL | - DELAY_SLOT_CLEARME); + ctx.envflags = tb->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL); ctx.bstate = BS_NONE; ctx.memidx = (ctx.tbflags & (1u << SR_MD)) == 0 ? 1 : 0; /* We don't know if the delayed pc came from a dynamic or static branch, @@ -1908,7 +1901,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) /* fall through */ case BS_NONE: if (ctx.envflags) { - gen_store_flags(ctx.envflags | DELAY_SLOT_CLEARME); + gen_store_flags(ctx.envflags); } gen_goto_tb(&ctx, 0, ctx.pc); break;