From patchwork Fri May 12 23:40:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9724927 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5D8EF60382 for ; Fri, 12 May 2017 23:45:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 406C32889A for ; Fri, 12 May 2017 23:45:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 312832889E; Fri, 12 May 2017 23:45:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 732F62889A for ; Fri, 12 May 2017 23:45:05 +0000 (UTC) Received: from localhost ([::1]:55699 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KF6-0004i0-Jt for patchwork-qemu-devel@patchwork.kernel.org; Fri, 12 May 2017 19:45:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45510) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAT-0001AE-TY for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAS-0003we-B6 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:17 -0400 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:34921) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAS-0003wH-6q for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:16 -0400 Received: by mail-qk0-x241.google.com with SMTP id k74so9846031qke.2 for ; Fri, 12 May 2017 16:40:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=YPQP9tDC9zcRKtGfaPiDBVLtkyii6a8GQ9gMemBQ6qH+W7sOQyS6d9yE2Okot0YxKs SFzfSvKhq5auuFcoj2npmPG199hW/Nmktcs6Lng2hVvwZJ9E8ILgm+RJEtkWbEeQoHL8 dcxXDJsQ2pJJ0Y+DByh43uarZczs3wCFTmb5DF7beHAHRnyPmG4mB585O4Itdv9jeN3t JJQLxkWLt3wBa8Zyi46bGQXyVNvfE0yhfj+fV0Lr2kl7FL5JmJcCSKUaOUolH3XcHxGY o6Z4AuiV9qZw80YiORnskKhkwUDKI023qU7BXKumJrG0Z7tGkF3HvHuFt44asU4UsQJz X8Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=oGFFMoiVaGqMutq93LnmgpoTSOiZs2HE1vE36UTPfgOp4BelQVHT1bbvosO07d0m+A tya8hUC5d5zLbqU8obMvYM/IC3GKUXVTI6gnY/TZYSraXmrIG154pDZgNqjmXaJeuqtq dOIQqC6IBWQRzb4rJE9Ts6zafgaKeF/eBND945hoKQBpWRHFkKWJgschu0o9PRN/oWd9 ioqAuEAtRh8Nvknk1dYZpqf7pqt0VkXTfpRUbxwu19LOTME2KekGCcWyHGpiibd9Nws+ OJugJN3d9mieMQK+R5XPvuk+Ff1slsbsSgxM17JBIxU6az3xe3LqIrrZeZqTNfWT7bQs 0QYw== X-Gm-Message-State: AODbwcBehcXfZeSBPOtQVjtH960ZbUFdKNyWaV8upP6WyQub7PVM28pJ ih5wjCRjC4Ak5g== X-Received: by 10.55.209.144 with SMTP id o16mr5690477qkl.188.1494632415592; Fri, 12 May 2017 16:40:15 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:01 -0700 Message-Id: <20170512234009.32557-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PULL 1/9] target/s390x: Implement STORE FACILITIES LIST EXTENDED X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP At the same time, improve STORE FACILITIES LIST so that we don't hard-code the list for all cpus. Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/misc_helper.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++ target/s390x/translate.c | 17 ++++++------- 4 files changed, 72 insertions(+), 8 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 9102071..01adb50 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -83,6 +83,8 @@ DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64) DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64) DEF_HELPER_FLAGS_2(sfas, TCG_CALL_NO_WG, void, env, i64) DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) +DEF_HELPER_2(stfle, i32, env, i64) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 075ff59..b6702da 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -747,6 +747,8 @@ C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0) C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0) +/* STORE FACILITY LIST EXTENDED */ + C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0) /* STORE FPC */ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0) diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index eca8244..bd94242 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -678,3 +678,62 @@ void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr) } } #endif + +/* The maximum bit defined at the moment is 129. */ +#define MAX_STFL_WORDS 3 + +/* Canonicalize the current cpu's features into the 64-bit words required + by STFLE. Return the index-1 of the max word that is non-zero. */ +static unsigned do_stfle(CPUS390XState *env, uint64_t words[MAX_STFL_WORDS]) +{ + S390CPU *cpu = s390_env_get_cpu(env); + const unsigned long *features = cpu->model->features; + unsigned max_bit = 0; + S390Feat feat; + + memset(words, 0, sizeof(uint64_t) * MAX_STFL_WORDS); + + if (test_bit(S390_FEAT_ZARCH, features)) { + /* z/Architecture is always active if around */ + words[0] = 1ull << (63 - 2); + } + + for (feat = find_first_bit(features, S390_FEAT_MAX); + feat < S390_FEAT_MAX; + feat = find_next_bit(features, S390_FEAT_MAX, feat + 1)) { + const S390FeatDef *def = s390_feat_def(feat); + if (def->type == S390_FEAT_TYPE_STFL) { + unsigned bit = def->bit; + if (bit > max_bit) { + max_bit = bit; + } + assert(bit / 64 < MAX_STFL_WORDS); + words[bit / 64] |= 1ULL << (63 - bit % 64); + } + } + + return max_bit / 64; +} + +void HELPER(stfl)(CPUS390XState *env) +{ + uint64_t words[MAX_STFL_WORDS]; + + do_stfle(env, words); + cpu_stl_data(env, 200, words[0] >> 32); +} + +uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) +{ + uint64_t words[MAX_STFL_WORDS]; + unsigned count_m1 = env->regs[0] & 0xff; + unsigned max_m1 = do_stfle(env, words); + unsigned i; + + for (i = 0; i <= count_m1; ++i) { + cpu_stq_data(env, addr + 8 * i, words[i]); + } + + env->regs[0] = deposit64(env->regs[0], 0, 8, max_m1); + return (count_m1 >= max_m1 ? 0 : 3); +} diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 01c6217..69940e3 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3628,15 +3628,8 @@ static ExitStatus op_spt(DisasContext *s, DisasOps *o) static ExitStatus op_stfl(DisasContext *s, DisasOps *o) { - TCGv_i64 f, a; - /* We really ought to have more complete indication of facilities - that we implement. Address this when STFLE is implemented. */ check_privileged(s); - f = tcg_const_i64(0xc0000000); - a = tcg_const_i64(200); - tcg_gen_qemu_st32(f, a, get_mem_index(s)); - tcg_temp_free_i64(f); - tcg_temp_free_i64(a); + gen_helper_stfl(cpu_env); return NO_EXIT; } @@ -3802,6 +3795,14 @@ static ExitStatus op_sturg(DisasContext *s, DisasOps *o) } #endif +static ExitStatus op_stfle(DisasContext *s, DisasOps *o) +{ + potential_page_fault(s); + gen_helper_stfle(cc_op, cpu_env, o->in2); + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_st8(DisasContext *s, DisasOps *o) { tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));