From patchwork Wed May 31 22:01:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 9758279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6C6C360360 for ; Wed, 31 May 2017 22:13:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D7E7284C3 for ; Wed, 31 May 2017 22:13:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 52296284DA; Wed, 31 May 2017 22:13:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8234A284C3 for ; Wed, 31 May 2017 22:13:27 +0000 (UTC) Received: from localhost ([::1]:34078 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBrq-00022q-Hn for patchwork-qemu-devel@patchwork.kernel.org; Wed, 31 May 2017 18:13:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39472) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBgg-00018X-DO for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dGBgb-0005Uo-OU for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:54 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:34986) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dGBgb-0005Lt-9p for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:49 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dGBgN-0004QL-Ui; Thu, 01 Jun 2017 00:01:36 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1dGBgM-0000yX-Hu; Thu, 01 Jun 2017 00:01:34 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Thu, 1 Jun 2017 00:01:13 +0200 Message-Id: <20170531220129.27724-15-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170531220129.27724-1-aurelien@aurel32.net> References: <20170531220129.27724-1-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH v3 14/30] target/s390x: improve 24-bit and 31-bit addresses read X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Improve fix_address to also handle the 24-bit mode. Rename fix_address to wrap_address to better explain what is changed. Replace the calls to get_address with x2 = 0 and b2 = 0 by call to wrap_address, leading to the removal of this function. Rename get_address_31fix into get_address. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target/s390x/mem_helper.c | 71 +++++++++++++++++++++-------------------------- 1 file changed, 31 insertions(+), 40 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 95f701dae2..2425bfc984 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -365,30 +365,23 @@ uint32_t HELPER(clm)(CPUS390XState *env, uint32_t r1, uint32_t mask, return cc; } -static inline uint64_t fix_address(CPUS390XState *env, uint64_t a) +static inline uint64_t wrap_address(CPUS390XState *env, uint64_t a) { - /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { - a &= 0x7fffffff; + if (!(env->psw.mask & PSW_MASK_32)) { + /* 24-Bit mode */ + a &= 0x00ffffff; + } else { + /* 31-Bit mode */ + a &= 0x7fffffff; + } } return a; } -static inline uint64_t get_address(CPUS390XState *env, int x2, int b2, int d2) -{ - uint64_t r = d2; - if (x2) { - r += env->regs[x2]; - } - if (b2) { - r += env->regs[b2]; - } - return fix_address(env, r); -} - -static inline uint64_t get_address_31fix(CPUS390XState *env, int reg) +static inline uint64_t get_address(CPUS390XState *env, int reg) { - return fix_address(env, env->regs[reg]); + return wrap_address(env, env->regs[reg]); } /* search string (c is byte to search, r2 is string, r1 end of string) */ @@ -399,8 +392,8 @@ uint64_t HELPER(srst)(CPUS390XState *env, uint64_t r0, uint64_t end, uint32_t len; uint8_t v, c = r0; - str = fix_address(env, str); - end = fix_address(env, end); + str = wrap_address(env, str); + end = wrap_address(env, end); /* Assume for now that R2 is unmodified. */ env->retxl = str; @@ -434,8 +427,8 @@ uint64_t HELPER(clst)(CPUS390XState *env, uint64_t c, uint64_t s1, uint64_t s2) uint32_t len; c = c & 0xff; - s1 = fix_address(env, s1); - s2 = fix_address(env, s2); + s1 = wrap_address(env, s1); + s2 = wrap_address(env, s2); /* Lest we fail to service interrupts in a timely manner, limit the amount of work we're willing to do. For now, let's cap at 8k. */ @@ -481,8 +474,8 @@ uint64_t HELPER(mvst)(CPUS390XState *env, uint64_t c, uint64_t d, uint64_t s) uint32_t len; c = c & 0xff; - d = fix_address(env, d); - s = fix_address(env, s); + d = wrap_address(env, d); + s = wrap_address(env, s); /* Lest we fail to service interrupts in a timely manner, limit the amount of work we're willing to do. For now, let's cap at 8k. */ @@ -540,9 +533,9 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, uint32_t r2) { uintptr_t ra = GETPC(); uint64_t destlen = env->regs[r1 + 1] & 0xffffff; - uint64_t dest = get_address_31fix(env, r1); + uint64_t dest = get_address(env, r1); uint64_t srclen = env->regs[r2 + 1] & 0xffffff; - uint64_t src = get_address_31fix(env, r2); + uint64_t src = get_address(env, r2); uint8_t pad = env->regs[r2 + 1] >> 24; uint8_t v; uint32_t cc; @@ -583,9 +576,9 @@ uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1, uint64_t a2, { uintptr_t ra = GETPC(); uint64_t destlen = env->regs[r1 + 1]; - uint64_t dest = env->regs[r1]; + uint64_t dest = get_address(env, r1); uint64_t srclen = env->regs[r3 + 1]; - uint64_t src = env->regs[r3]; + uint64_t src = get_address(env, r3); uint8_t pad = a2 & 0xff; uint8_t v; uint32_t cc; @@ -593,8 +586,6 @@ uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1, uint64_t a2, if (!(env->psw.mask & PSW_MASK_64)) { destlen = (uint32_t)destlen; srclen = (uint32_t)srclen; - dest &= 0x7fffffff; - src &= 0x7fffffff; } if (destlen == srclen) { @@ -634,9 +625,9 @@ uint32_t HELPER(clcle)(CPUS390XState *env, uint32_t r1, uint64_t a2, { uintptr_t ra = GETPC(); uint64_t destlen = env->regs[r1 + 1]; - uint64_t dest = get_address_31fix(env, r1); + uint64_t dest = get_address(env, r1); uint64_t srclen = env->regs[r3 + 1]; - uint64_t src = get_address_31fix(env, r3); + uint64_t src = get_address(env, r3); uint8_t pad = a2 & 0xff; uint32_t cc = 0; @@ -1020,7 +1011,7 @@ uint32_t HELPER(testblock)(CPUS390XState *env, uint64_t real_addr) uint64_t abs_addr; int i; - real_addr = fix_address(env, real_addr); + real_addr = wrap_address(env, real_addr); abs_addr = mmu_real2abs(env, real_addr) & TARGET_PAGE_MASK; if (!address_space_access_valid(&address_space_memory, abs_addr, TARGET_PAGE_SIZE, true)) { @@ -1054,7 +1045,7 @@ uint64_t HELPER(iske)(CPUS390XState *env, uint64_t r2) { static S390SKeysState *ss; static S390SKeysClass *skeyclass; - uint64_t addr = get_address(env, 0, 0, r2); + uint64_t addr = wrap_address(env, r2); uint8_t key; if (addr > ram_size) { @@ -1077,7 +1068,7 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2) { static S390SKeysState *ss; static S390SKeysClass *skeyclass; - uint64_t addr = get_address(env, 0, 0, r2); + uint64_t addr = wrap_address(env, r2); uint8_t key; if (addr > ram_size) { @@ -1234,14 +1225,14 @@ uint64_t HELPER(lura)(CPUS390XState *env, uint64_t addr) { CPUState *cs = CPU(s390_env_get_cpu(env)); - return (uint32_t)ldl_phys(cs->as, get_address(env, 0, 0, addr)); + return (uint32_t)ldl_phys(cs->as, wrap_address(env, addr)); } uint64_t HELPER(lurag)(CPUS390XState *env, uint64_t addr) { CPUState *cs = CPU(s390_env_get_cpu(env)); - return ldq_phys(cs->as, get_address(env, 0, 0, addr)); + return ldq_phys(cs->as, wrap_address(env, addr)); } /* store using real address */ @@ -1249,7 +1240,7 @@ void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1) { CPUState *cs = CPU(s390_env_get_cpu(env)); - stl_phys(cs->as, get_address(env, 0, 0, addr), (uint32_t)v1); + stl_phys(cs->as, wrap_address(env, addr), (uint32_t)v1); if ((env->psw.mask & PSW_MASK_PER) && (env->cregs[9] & PER_CR9_EVENT_STORE) && @@ -1264,7 +1255,7 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) { CPUState *cs = CPU(s390_env_get_cpu(env)); - stq_phys(cs->as, get_address(env, 0, 0, addr), v1); + stq_phys(cs->as, wrap_address(env, addr), v1); if ((env->psw.mask & PSW_MASK_PER) && (env->cregs[9] & PER_CR9_EVENT_STORE) && @@ -1382,8 +1373,8 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, uint64_t r1, uint64_t addr) uint32_t d1 = extract64(insn, 32, 12); uint32_t b2 = extract64(insn, 28, 4); uint32_t d2 = extract64(insn, 16, 12); - uint64_t a1 = get_address(env, 0, b1, d1); - uint64_t a2 = get_address(env, 0, b2, d2); + uint64_t a1 = wrap_address(env, env->regs[b1] + d1); + uint64_t a2 = wrap_address(env, env->regs[b2] + d2); env->cc_op = helper(env, l, a1, a2, 0); env->psw.addr += ilen;