From patchwork Mon Jun 5 16:52:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9766903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F1C06034B for ; Mon, 5 Jun 2017 16:56:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 900A027E5A for ; Mon, 5 Jun 2017 16:56:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 84FF227F8F; Mon, 5 Jun 2017 16:56:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1CA4027E5A for ; Mon, 5 Jun 2017 16:56:49 +0000 (UTC) Received: from localhost ([::1]:34373 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dHvJ9-0006nc-Rw for patchwork-qemu-devel@patchwork.kernel.org; Mon, 05 Jun 2017 12:56:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56888) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dHvFZ-0004jr-Ca for qemu-devel@nongnu.org; Mon, 05 Jun 2017 12:53:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dHvFT-0003sW-J1 for qemu-devel@nongnu.org; Mon, 05 Jun 2017 12:53:05 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:35021) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dHvFT-0003sI-ES for qemu-devel@nongnu.org; Mon, 05 Jun 2017 12:52:59 -0400 Received: by mail-qt0-x243.google.com with SMTP id x58so9854059qtc.2 for ; Mon, 05 Jun 2017 09:52:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=wiWtK+g4bdbk1L1X4JPIL2RimPi0A1oK1qSeDEZJZFc=; b=Gp0d2ZBiMqvVMumvr6iw9eg8Ebr3bsQwKxTQEdGjklMDPNZ/BWoCzV/mSCMOzloBPi f9NXNmBUjhl6ICZHZgcoPh6D6L0cKZK1o/M4n5InVWEf5WNgA2TDvLjjA45H9BuCQnON U54DIWy55rMoPY32lpUr8S51XkSsGeE0fMDQ2Jl8h0C4yM0sYJ7mg91gDlSAf0/ZSyWO gfbYZOFqycH6DA9rUbj9cwP1ktCxcAUZ9//RXtswjujnf3eEGTtI7C9ViQkPd9dzIhqF +ByvvT/aQvEHc88nMOKCJw7XNmPIoElvF/LNJ6kQtklEsVmB2qY5Gn6cpLm7hh0PIt9e ctAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=wiWtK+g4bdbk1L1X4JPIL2RimPi0A1oK1qSeDEZJZFc=; b=n6/2alnrjHBslQk1OUcS7SmyHNNBsPPiefvPTv7o9GYpD7tNEq4A93+te45vu9Fe28 97QyhwHYNVduSPVbPD9d7621jyWa5PbEPqD8US2HIwvlZJgCRBar7+PjwFlKmlO7f3qc VaRL2Fk2hNQ0j0b4XkI5+P5fi6x6IHJOnhffGQOWXKUStTt+j9iSthM21OTXyOs7QJZ3 xxne6J21msES5VIu996AUqaZDcfUTlpT3ofthA+ylR7X0YL8D1ARh6NAfOPlzVOMQO+T T1nfnRNobxG3PS63fS3zL5VWNpN9MxwDXgiDzlGXOgRoYIYbx4FEVJy+w9Yr+ZLJOXMw YFtg== X-Gm-Message-State: AODbwcDhicn7WEKQml4DLRDG0vDFjUZFFRbOns2xNgKsEiHwC7S1j+q2 VbD/nj423jORBvooGmA= X-Received: by 10.237.41.65 with SMTP id s59mr3181353qtd.8.1496681578680; Mon, 05 Jun 2017 09:52:58 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id c6sm1637044qtb.56.2017.06.05.09.52.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 05 Jun 2017 09:52:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 5 Jun 2017 09:52:23 -0700 Message-Id: <20170605165233.4135-17-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170605165233.4135-1-rth@twiddle.net> References: <20170605165233.4135-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PULL 16/26] tcg/arm: Clarify tcg_out_bx for arm4 host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP In theory this would re-enable usage of QEMU on an armv4 host. Whether this is worthwhile is debatable -- we've been unconditionally issuing the armv5t BX instruction in the prologue since 2011 without complaint. Possibly we should simply require an armv6 host. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index e75a6d4..590c57d 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -329,11 +329,6 @@ static const uint8_t tcg_cond_to_arm_cond[] = { [TCG_COND_GTU] = COND_HI, }; -static inline void tcg_out_bx(TCGContext *s, int cond, int rn) -{ - tcg_out32(s, (cond << 28) | 0x012fff10 | rn); -} - static inline void tcg_out_b(TCGContext *s, int cond, int32_t offset) { tcg_out32(s, (cond << 28) | 0x0a000000 | @@ -402,6 +397,18 @@ static inline void tcg_out_mov_reg(TCGContext *s, int cond, int rd, int rm) } } +static inline void tcg_out_bx(TCGContext *s, int cond, TCGReg rn) +{ + /* Unless the C portion of QEMU is compiled as thumb, we don't + actually need true BX semantics; merely a branch to an address + held in a register. */ + if (use_armv5t_instructions) { + tcg_out32(s, (cond << 28) | 0x012fff10 | rn); + } else { + tcg_out_mov_reg(s, cond, TCG_REG_PC, rn); + } +} + static inline void tcg_out_dat_imm(TCGContext *s, int cond, int opc, int rd, int rn, int im) { @@ -977,7 +984,7 @@ static inline void tcg_out_st8(TCGContext *s, int cond, * with the code buffer limited to 16MB we wouldn't need the long case. * But we also use it for the tail-call to the qemu_ld/st helpers, which does. */ -static inline void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr) +static void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr) { intptr_t addri = (intptr_t)addr; ptrdiff_t disp = tcg_pcrel_diff(s, addr); @@ -987,15 +994,9 @@ static inline void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr) return; } + assert(use_armv5t_instructions || (addri & 1) == 0); tcg_out_movi32(s, cond, TCG_REG_TMP, addri); - if (use_armv5t_instructions) { - tcg_out_bx(s, cond, TCG_REG_TMP); - } else { - if (addri & 1) { - tcg_abort(); - } - tcg_out_mov_reg(s, cond, TCG_REG_PC, TCG_REG_TMP); - } + tcg_out_bx(s, cond, TCG_REG_TMP); } /* The call case is mostly used for helpers - so it's not unreasonable