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HE1PR08MB0842; 20:mCnrHejnFCFaB52KHtTiZSr5ot29z07XjdItX4BmdAdPzIwe+nfvwkTO9M5ipSAF3jRPsIdvfvxO+RUHcIvPEhqgkJ81dpUrBeAh42oNLAFgmSOrOs9RNI8SziP+IavhAFwq4o1AhhqI7xP/kNXgNtJwjIryD8y9t3T7CB3yzjg= X-OriginatorOrg: virtuozzo.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jun 2017 16:25:12.6584 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR08MB0842 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.3.131 Subject: [Qemu-devel] [PATCH v2 05/23] hyperv: make SynIC version msr constant X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Denis V . Lunev" , Evgeny Yakovlev , Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The value of HV_X64_MSR_SVERSION is initialized once at vcpu init, and is reset to zero on vcpu reset, which is wrong. It is supposed to be a constant, so drop the field from X86CPU, set the msr with the constant value, and don't bother getting it. Signed-off-by: Roman Kagan --- v1 -> v2: - split out of v1 patch 4 - make the value constant instead of keeping it on X86CPU target/i386/cpu.h | 1 - target/i386/kvm.c | 9 ++------- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index ad8600d..917e3c4 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1099,7 +1099,6 @@ typedef struct CPUX86State { uint64_t msr_hv_crash_params[HV_CRASH_PARAMS]; uint64_t msr_hv_runtime; uint64_t msr_hv_synic_control; - uint64_t msr_hv_synic_version; uint64_t msr_hv_synic_evt_page; uint64_t msr_hv_synic_msg_page; uint64_t msr_hv_synic_sint[HV_SINT_COUNT]; diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 27404dd..2795b63 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -654,7 +654,6 @@ static int hyperv_handle_properties(CPUState *cs) } env->features[FEAT_HYPERV_EAX] |= HV_SYNIC_AVAILABLE; - env->msr_hv_synic_version = HV_SYNIC_VERSION; } if (cpu->hyperv_stimer) { if (!has_msr_hv_stimer) { @@ -1752,10 +1751,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) if (cpu->hyperv_synic) { int j; + kvm_msr_entry_add(cpu, HV_X64_MSR_SVERSION, HV_SYNIC_VERSION); + kvm_msr_entry_add(cpu, HV_X64_MSR_SCONTROL, env->msr_hv_synic_control); - kvm_msr_entry_add(cpu, HV_X64_MSR_SVERSION, - env->msr_hv_synic_version); kvm_msr_entry_add(cpu, HV_X64_MSR_SIEFP, env->msr_hv_synic_evt_page); kvm_msr_entry_add(cpu, HV_X64_MSR_SIMP, @@ -2160,7 +2159,6 @@ static int kvm_get_msrs(X86CPU *cpu) uint32_t msr; kvm_msr_entry_add(cpu, HV_X64_MSR_SCONTROL, 0); - kvm_msr_entry_add(cpu, HV_X64_MSR_SVERSION, 0); kvm_msr_entry_add(cpu, HV_X64_MSR_SIEFP, 0); kvm_msr_entry_add(cpu, HV_X64_MSR_SIMP, 0); for (msr = HV_X64_MSR_SINT0; msr <= HV_X64_MSR_SINT15; msr++) { @@ -2364,9 +2362,6 @@ static int kvm_get_msrs(X86CPU *cpu) case HV_X64_MSR_SCONTROL: env->msr_hv_synic_control = msrs[i].data; break; - case HV_X64_MSR_SVERSION: - env->msr_hv_synic_version = msrs[i].data; - break; case HV_X64_MSR_SIEFP: env->msr_hv_synic_evt_page = msrs[i].data; break;