Message ID | 20170707022111.21836-18-rth@twiddle.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 2017-07-06 16:21, Richard Henderson wrote: > We do not need to form full 64-bit quantities in order to perform > the move. This reduces code expansion on 64-bit hosts. > > Signed-off-by: Richard Henderson <rth@twiddle.net> > --- > target/sh4/translate.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index fcdabe8..3453f19 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -993,10 +993,10 @@ static void _decode_opc(DisasContext * ctx) case 0xf00c: /* fmov {F,D,X}Rm,{F,D,X}Rn - FPSCR: Nothing */ CHECK_FPU_ENABLED if (ctx->tbflags & FPSCR_SZ) { - TCGv_i64 fp = tcg_temp_new_i64(); - gen_load_fpr64(ctx, fp, XHACK(B7_4)); - gen_store_fpr64(ctx, fp, XHACK(B11_8)); - tcg_temp_free_i64(fp); + int xsrc = XHACK(B7_4); + int xdst = XHACK(B11_8); + tcg_gen_mov_i32(FREG(xdst), FREG(xsrc)); + tcg_gen_mov_i32(FREG(xdst + 1), FREG(xsrc + 1)); } else { tcg_gen_mov_i32(FREG(B11_8), FREG(B7_4)); }
We do not need to form full 64-bit quantities in order to perform the move. This reduces code expansion on 64-bit hosts. Signed-off-by: Richard Henderson <rth@twiddle.net> --- target/sh4/translate.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)