diff mbox

[v2,03/27] target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK

Message ID 20170707022111.21836-4-rth@twiddle.net (mailing list archive)
State New, archived
Headers show

Commit Message

Richard Henderson July 7, 2017, 2:20 a.m. UTC
We'll be putting more things into this bitmask soon.
Let's have a name that covers all possible uses.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/sh4/cpu.h       | 4 +++-
 target/sh4/translate.c | 4 ++--
 2 files changed, 5 insertions(+), 3 deletions(-)

Comments

Aurelien Jarno July 7, 2017, 9:42 p.m. UTC | #1
On 2017-07-06 16:20, Richard Henderson wrote:
> We'll be putting more things into this bitmask soon.
> Let's have a name that covers all possible uses.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/sh4/cpu.h       | 4 +++-
>  target/sh4/translate.c | 4 ++--
>  2 files changed, 5 insertions(+), 3 deletions(-)

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Philippe Mathieu-Daudé July 8, 2017, 4:29 p.m. UTC | #2
On 07/06/2017 11:20 PM, Richard Henderson wrote:
> We'll be putting more things into this bitmask soon.
> Let's have a name that covers all possible uses.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>   target/sh4/cpu.h       | 4 +++-
>   target/sh4/translate.c | 4 ++--
>   2 files changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index b15116e..240ed36 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -96,6 +96,8 @@
>   #define DELAY_SLOT_CONDITIONAL (1 << 1)
>   #define DELAY_SLOT_RTE         (1 << 2)
>   
> +#define TB_FLAG_ENVFLAGS_MASK  DELAY_SLOT_MASK
> +
>   typedef struct tlb_t {
>       uint32_t vpn;		/* virtual page number */
>       uint32_t ppn;		/* physical page number */
> @@ -389,7 +391,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
>   {
>       *pc = env->pc;
>       *cs_base = 0;
> -    *flags = (env->flags & DELAY_SLOT_MASK)                    /* Bits  0- 2 */
> +    *flags = (env->flags & TB_FLAG_ENVFLAGS_MASK) /* Bits  0-2 */
>               | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR))  /* Bits 19-21 */
>               | (env->sr & ((1u << SR_MD) | (1u << SR_RB)))      /* Bits 29-30 */
>               | (env->sr & (1u << SR_FD))                        /* Bit 15 */
> diff --git a/target/sh4/translate.c b/target/sh4/translate.c
> index 663b5c0..cf53cd6 100644
> --- a/target/sh4/translate.c
> +++ b/target/sh4/translate.c
> @@ -225,7 +225,7 @@ static inline void gen_save_cpu_state(DisasContext *ctx, bool save_pc)
>       if (ctx->delayed_pc != (uint32_t) -1) {
>           tcg_gen_movi_i32(cpu_delayed_pc, ctx->delayed_pc);
>       }
> -    if ((ctx->tbflags & DELAY_SLOT_MASK) != ctx->envflags) {
> +    if ((ctx->tbflags & TB_FLAG_ENVFLAGS_MASK) != ctx->envflags) {
>           tcg_gen_movi_i32(cpu_flags, ctx->envflags);
>       }
>   }
> @@ -1837,7 +1837,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
>       pc_start = tb->pc;
>       ctx.pc = pc_start;
>       ctx.tbflags = (uint32_t)tb->flags;
> -    ctx.envflags = tb->flags & DELAY_SLOT_MASK;
> +    ctx.envflags = tb->flags & TB_FLAG_ENVFLAGS_MASK;
>       ctx.bstate = BS_NONE;
>       ctx.memidx = (ctx.tbflags & (1u << SR_MD)) == 0 ? 1 : 0;
>       /* We don't know if the delayed pc came from a dynamic or static branch,
>
diff mbox

Patch

diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index b15116e..240ed36 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -96,6 +96,8 @@ 
 #define DELAY_SLOT_CONDITIONAL (1 << 1)
 #define DELAY_SLOT_RTE         (1 << 2)
 
+#define TB_FLAG_ENVFLAGS_MASK  DELAY_SLOT_MASK
+
 typedef struct tlb_t {
     uint32_t vpn;		/* virtual page number */
     uint32_t ppn;		/* physical page number */
@@ -389,7 +391,7 @@  static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
 {
     *pc = env->pc;
     *cs_base = 0;
-    *flags = (env->flags & DELAY_SLOT_MASK)                    /* Bits  0- 2 */
+    *flags = (env->flags & TB_FLAG_ENVFLAGS_MASK) /* Bits  0-2 */
             | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR))  /* Bits 19-21 */
             | (env->sr & ((1u << SR_MD) | (1u << SR_RB)))      /* Bits 29-30 */
             | (env->sr & (1u << SR_FD))                        /* Bit 15 */
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 663b5c0..cf53cd6 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -225,7 +225,7 @@  static inline void gen_save_cpu_state(DisasContext *ctx, bool save_pc)
     if (ctx->delayed_pc != (uint32_t) -1) {
         tcg_gen_movi_i32(cpu_delayed_pc, ctx->delayed_pc);
     }
-    if ((ctx->tbflags & DELAY_SLOT_MASK) != ctx->envflags) {
+    if ((ctx->tbflags & TB_FLAG_ENVFLAGS_MASK) != ctx->envflags) {
         tcg_gen_movi_i32(cpu_flags, ctx->envflags);
     }
 }
@@ -1837,7 +1837,7 @@  void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
     pc_start = tb->pc;
     ctx.pc = pc_start;
     ctx.tbflags = (uint32_t)tb->flags;
-    ctx.envflags = tb->flags & DELAY_SLOT_MASK;
+    ctx.envflags = tb->flags & TB_FLAG_ENVFLAGS_MASK;
     ctx.bstate = BS_NONE;
     ctx.memidx = (ctx.tbflags & (1u << SR_MD)) == 0 ? 1 : 0;
     /* We don't know if the delayed pc came from a dynamic or static branch,