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[PULL,v2,11/14] target/sparc: optimize gen_op_mulscc() using deposit op

Message ID 20170719233455.8740-12-rth@twiddle.net (mailing list archive)
State New, archived
Headers show

Commit Message

Richard Henderson July 19, 2017, 11:34 p.m. UTC 
From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Suggested-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20170718045540.16322-9-f4bug@amsat.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/sparc/translate.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)
diff mbox

Patch

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 67a83b77cc..d13173275f 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -632,11 +632,8 @@  static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
 
     // b2 = T0 & 1;
     // env->y = (b2 << 31) | (env->y >> 1);
-    tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
-    tcg_gen_shli_tl(r_temp, r_temp, 31);
     tcg_gen_extract_tl(t0, cpu_y, 1, 31);
-    tcg_gen_or_tl(t0, t0, r_temp);
-    tcg_gen_andi_tl(cpu_y, t0, 0xffffffff);
+    tcg_gen_deposit_tl(cpu_y, t0, cpu_cc_src, 31, 1);
 
     // b1 = N ^ V;
     gen_mov_reg_N(t0, cpu_psr);