From patchwork Wed Jul 19 23:34:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9853361 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 43D6C60392 for ; Wed, 19 Jul 2017 23:39:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21C9B286FD for ; Wed, 19 Jul 2017 23:39:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1679528715; Wed, 19 Jul 2017 23:39:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8AE99286FD for ; Wed, 19 Jul 2017 23:39:43 +0000 (UTC) Received: from localhost ([::1]:35395 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dXyZC-0001eR-LT for patchwork-qemu-devel@patchwork.kernel.org; Wed, 19 Jul 2017 19:39:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dXyVI-00080o-Ux for qemu-devel@nongnu.org; Wed, 19 Jul 2017 19:35:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dXyVH-0006W4-Kn for qemu-devel@nongnu.org; Wed, 19 Jul 2017 19:35:40 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:36195) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dXyVH-0006Vo-CV for qemu-devel@nongnu.org; Wed, 19 Jul 2017 19:35:39 -0400 Received: by mail-qt0-x243.google.com with SMTP id l55so1775913qtl.3 for ; Wed, 19 Jul 2017 16:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=vENqpYa1jHb5ylNSlzdqxm1guTr/1VMzalNuNrecBtw=; b=o6MRix1fFAGE/zUm2ETg6Z3a4nJqsfphYcNTTcBzmOFzPwIQdSC80oaTpuVnGzHAxp Ka8FpJEY2bimZNZtBTS6/A1lh35W5wo/EibdFzzk4B6v9S2uiT2faiOEa3IiO6y6NG/5 tMeJl49kSuICPVZbKx2qOYKzhghF/UP0GyABpRX8GS4fV33I8BEhZHL0GwpvZKGDqR/w gnJCghOwwVQY9DCLogiaARB6wcRFLuDtU9HimSDtUzxn8zFNNv1nEqh+b1k6QfttIXu6 TD9JpxPIrU1VLZVefXPZ4cjPKajxwAaUeRgznOPVDMlEQWe8gIET0KKpzMlh32Didnk+ ++QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=vENqpYa1jHb5ylNSlzdqxm1guTr/1VMzalNuNrecBtw=; b=AH8gmifcccQ6sovNTBcrHsOF2qtqzetI1krHjYl01MIap0OojRb6ji9H3BT9KCsTP9 KVw3W0/p25URzVKB3RsR6MyF4x89C0qNITtC6/MGkmQhbYkxES2D3huTHnO5mLNZPFAd 1CnKF7oR1BmY8sQmXNzSyspNwqhEMs2hoHXQNa66TtDiA1Xgwe25YmlfeB8SffJBnMBS AdABZghHWDPLjCS3JzM+v7BN06CWs9eaXQCwnYs7vFUbB/2YFBd2uLe3YhGShzo/n18B A1KTDUhOrdHelhuO2fvqOynmigrTA4N/dqUXT/jB6zS/uFB5ivH9YS87dFZFVRTiM2e/ 1NXQ== X-Gm-Message-State: AIVw111pVhZjC91ImerEHa1R/bhsRTIPoAfJ7ktgIK70oza2AxrFoTbN f6akeLny7tf0ZOSTmmw= X-Received: by 10.237.40.69 with SMTP id r63mr2611442qtd.72.1500507338595; Wed, 19 Jul 2017 16:35:38 -0700 (PDT) Received: from bigtime.com ([203.221.203.174]) by smtp.gmail.com with ESMTPSA id w33sm857130qth.96.2017.07.19.16.35.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 Jul 2017 16:35:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 19 Jul 2017 13:34:42 -1000 Message-Id: <20170719233455.8740-2-rth@twiddle.net> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170719233455.8740-1-rth@twiddle.net> References: <20170719233455.8740-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PULL v2 01/14] tcg/mips: reserve a register for the guest_base. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Jiang Biao Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Jiang Biao Reserve a register for the guest_base using ppc code for reference. By doing so, we do not have to recompute it for every memory load. Signed-off-by: Jiang Biao Signed-off-by: Richard Henderson Message-Id: <1499677934-2249-1-git-send-email-jiang.biao2@zte.com.cn> --- tcg/mips/tcg-target.inc.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 85756b81d5..1a8169f5fc 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -85,6 +85,10 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define TCG_TMP2 TCG_REG_T8 #define TCG_TMP3 TCG_REG_T7 +#ifndef CONFIG_SOFTMMU +#define TCG_GUEST_BASE_REG TCG_REG_S1 +#endif + /* check if we really need so many registers :P */ static const int tcg_target_reg_alloc_order[] = { /* Call saved registers. */ @@ -1547,8 +1551,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) } else if (guest_base == (int16_t)guest_base) { tcg_out_opc_imm(s, ALIAS_PADDI, base, addr_regl, guest_base); } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_TMP0, guest_base); - tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_TMP0, addr_regl); + tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_GUEST_BASE_REG, addr_regl); } tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); #endif @@ -1652,8 +1655,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) } else if (guest_base == (int16_t)guest_base) { tcg_out_opc_imm(s, ALIAS_PADDI, base, addr_regl, guest_base); } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_TMP0, guest_base); - tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_TMP0, addr_regl); + tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_GUEST_BASE_REG, addr_regl); } tcg_out_qemu_st_direct(s, data_regl, data_regh, base, opc); #endif @@ -2452,6 +2454,13 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } +#ifndef CONFIG_SOFTMMU + if (guest_base) { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); + tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + } +#endif + /* Call generated code */ tcg_out_opc_reg(s, OPC_JR, 0, tcg_target_call_iarg_regs[1], 0); /* delay slot */