From patchwork Mon Aug 28 01:56:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?UTF-8?q?Sergio=20Andr=C3=A9s=20G=C3=B3mez=20Del=20Real?= X-Patchwork-Id: 9924047 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 19F956035E for ; Mon, 28 Aug 2017 02:01:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BD592866F for ; Mon, 28 Aug 2017 02:01:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 00AE328671; Mon, 28 Aug 2017 02:01:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 975CC2866F for ; Mon, 28 Aug 2017 02:01:34 +0000 (UTC) Received: from localhost ([::1]:36508 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dm9Mr-0007AP-OQ for patchwork-qemu-devel@patchwork.kernel.org; Sun, 27 Aug 2017 22:01:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41996) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dm9Ix-0004rn-ND for qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dm9Iw-00010z-FS for qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:31 -0400 Received: from mail-vk0-x242.google.com ([2607:f8b0:400c:c05::242]:38039) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dm9Iw-00010k-9m for qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:30 -0400 Received: by mail-vk0-x242.google.com with SMTP id w84so1879879vkd.5 for ; Sun, 27 Aug 2017 18:57:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HZZGcCSvSL78kL4Db7ZyAqa2JGN9UEZ4tyvnrVdF9i4=; b=HY/6FWR3p6edQShj6irqngnrp5/iIDK7qSdi52sSHcDNC4iwECpLhl+TNEoYr7zlCl kOS8h27pF2pZrwLXcROdLgl2XAQZ+/szmdMQAsxcYFyAt0hpPTSeUWzFgC5DjhtEsb7m xPEgA0M28oHBfheA5WrMII5r+a2nBLcqCMIXsZIrUAecs929ukZe1h8Ij5Dmtq4ZB2aW txz6kXUeFfpT1Sj9xXsItO9QF/31PDD9tNjgi8QzUzdk/jSuSL0TAVzGgK8L9Z4bH9m5 J5xbW1ulYKYQT8blbIGPMDsi3XL5J24Z3pUah0SFFm9d8rLJ3CojKiPImSfucVgPbwcP c2Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HZZGcCSvSL78kL4Db7ZyAqa2JGN9UEZ4tyvnrVdF9i4=; b=KTCbjBPIX09T94dIC3IUThx7nkEeEUNb12pW7LZUQ9Om/RVxFwdqXN0oUrLWKqW3xz 9juXLkVA1K3TU5WsZiIAK2GgYRaJ1H1qU+NUb/p4pHyKk3r21aKiC9aNwNTMqVuTM6P4 lCHhwV38T/+mDIINet9PJPtq1Gw4lGQSndy9ftQQHs+5RiF3F9W6eNY0xReYzaVP/bbr TejXJhcRebCrukhOz6bfIu8aL+kADDMv1cxo5IS2NJJtZBgzvzJ9R9VycqwvDg4KZw2M sPCztbDRSfTR4vILOFEAvm2XaTOMgVeuncql/WAgOwoCwz49i3pcasjhwIMOQcyPXiIF N2pg== X-Gm-Message-State: AHYfb5gUHwn604j7bFc0SapzHGavExLGLgN6aomaWr2Niqk7CbmAhH6y uj30OtYfMsvpdiPv X-Received: by 10.31.208.134 with SMTP id h128mr3353148vkg.93.1503885449447; Sun, 27 Aug 2017 18:57:29 -0700 (PDT) Received: from localhost.localdomain ([191.109.6.191]) by smtp.gmail.com with ESMTPSA id y12sm2696824uad.22.2017.08.27.18.57.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 27 Aug 2017 18:57:29 -0700 (PDT) From: Sergio Andres Gomez Del Real X-Google-Original-From: Sergio Andres Gomez Del Real To: qemu-devel@nongnu.org Date: Sun, 27 Aug 2017 20:56:44 -0500 Message-Id: <20170828015654.2530-5-Sergio.G.DelReal@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170828015654.2530-1-Sergio.G.DelReal@gmail.com> References: <20170828015654.2530-1-Sergio.G.DelReal@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400c:c05::242 Subject: [Qemu-devel] [PATCH 04/14] hvf: add fields to CPUState and CPUX86State; add definitions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sergio Andres Gomez Del Real Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This commit adds some fields specific to hvf in CPUState and CPUX86State. It also adds some handy #defines. Signed-off-by: Sergio Andres Gomez Del Real --- include/qom/cpu.h | 8 ++++++++ target/i386/cpu.h | 23 +++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 25eefea7ab..c46eb61240 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -407,6 +407,14 @@ struct CPUState { * unnecessary flushes. */ uint16_t pending_tlb_flush; + + // HVF + bool hvf_vcpu_dirty; + uint64_t hvf_fd; // fd of vcpu created by HVF + // Supporting data structures for VMCS capabilities + // and x86 emulation state + struct hvf_vcpu_caps* hvf_caps; + struct hvf_x86_state* hvf_x86; }; QTAILQ_HEAD(CPUTailQ, CPUState); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 051867399b..7d90f08b98 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -82,15 +82,19 @@ #define R_GS 5 /* segment descriptor fields */ +#define DESC_G_SHIFT 23 #define DESC_G_MASK (1 << 23) #define DESC_B_SHIFT 22 #define DESC_B_MASK (1 << DESC_B_SHIFT) #define DESC_L_SHIFT 21 /* x86_64 only : 64 bit code segment */ #define DESC_L_MASK (1 << DESC_L_SHIFT) +#define DESC_AVL_SHIFT 20 #define DESC_AVL_MASK (1 << 20) +#define DESC_P_SHIFT 15 #define DESC_P_MASK (1 << 15) #define DESC_DPL_SHIFT 13 #define DESC_DPL_MASK (3 << DESC_DPL_SHIFT) +#define DESC_S_SHIFT 12 #define DESC_S_MASK (1 << 12) #define DESC_TYPE_SHIFT 8 #define DESC_TYPE_MASK (15 << DESC_TYPE_SHIFT) @@ -631,6 +635,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word Instructions */ #define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensions */ +#define CPUID_7_0_ECX_AVX512BMI (1U << 1) #define CPUID_7_0_ECX_VBMI (1U << 1) /* AVX-512 Vector Byte Manipulation Instrs */ #define CPUID_7_0_ECX_UMIP (1U << 2) #define CPUID_7_0_ECX_PKU (1U << 3) @@ -806,6 +811,20 @@ typedef struct SegmentCache { float64 _d_##n[(bits)/64]; \ } +typedef union { + uint8_t _b[16]; + uint16_t _w[8]; + uint32_t _l[4]; + uint64_t _q[2]; +} XMMReg; + +typedef union { + uint8_t _b[32]; + uint16_t _w[16]; + uint32_t _l[8]; + uint64_t _q[4]; +} YMMReg; + typedef MMREG_UNION(ZMMReg, 512) ZMMReg; typedef MMREG_UNION(MMXReg, 64) MMXReg; @@ -1041,7 +1060,11 @@ typedef struct CPUX86State { ZMMReg xmm_t0; MMXReg mmx_t0; + XMMReg ymmh_regs[CPU_NB_REGS]; + uint64_t opmask_regs[NB_OPMASK_REGS]; + YMMReg zmmh_regs[CPU_NB_REGS]; + ZMMReg hi16_zmm_regs[CPU_NB_REGS]; /* sysenter registers */ uint32_t sysenter_cs;