From patchwork Thu Sep 7 20:13:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 9942787 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C3265600CB for ; Thu, 7 Sep 2017 20:18:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B1DD222701 for ; Thu, 7 Sep 2017 20:18:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A6BAB22B1F; Thu, 7 Sep 2017 20:18:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5E67A22701 for ; Thu, 7 Sep 2017 20:18:25 +0000 (UTC) Received: from localhost ([::1]:42112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dq3Fo-0006bN-J7 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 07 Sep 2017 16:18:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dq3Br-0004Ie-B8 for qemu-devel@nongnu.org; Thu, 07 Sep 2017 16:14:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dq3Bm-0002Hw-P5 for qemu-devel@nongnu.org; Thu, 07 Sep 2017 16:14:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52732) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dq3Bm-0002HU-Il for qemu-devel@nongnu.org; Thu, 07 Sep 2017 16:14:14 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 976E5883CD; Thu, 7 Sep 2017 20:14:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 976E5883CD Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=david@redhat.com Received: from t460s.redhat.com (ovpn-116-60.ams2.redhat.com [10.36.116.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6DCDE5C88F; Thu, 7 Sep 2017 20:14:11 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Thu, 7 Sep 2017 22:13:25 +0200 Message-Id: <20170907201335.13956-12-david@redhat.com> In-Reply-To: <20170907201335.13956-1-david@redhat.com> References: <20170907201335.13956-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 07 Sep 2017 20:14:13 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 11/21] s390x: allow only 1 CPU with TCG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Rosato , thuth@redhat.com, Eduardo Habkost , david@redhat.com, cohuck@redhat.com, Richard Henderson , Alexander Graf , borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Specifying more than 1 CPU (e.g. -smp 5) leads to SIGP errors (the guest tries to bring these CPUs up but fails), because we don't support multiple CPUs on s390x under TCG. Let's bail out if more than 1 is specified, so we don't raise people's hope. Make it a define, so we can easily bump it up later. Tested-by: Matthew Rosato Signed-off-by: David Hildenbrand --- hw/s390x/s390-virtio-ccw.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index f67b4b5d58..f1198b2745 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -23,6 +23,7 @@ #include "hw/s390x/css.h" #include "virtio-ccw.h" #include "qemu/config-file.h" +#include "qemu/error-report.h" #include "s390-pci-bus.h" #include "hw/s390x/storage-keys.h" #include "hw/s390x/storage-attributes.h" @@ -47,6 +48,8 @@ S390CPU *s390_cpu_addr2state(uint16_t cpu_addr) return cpu_states[cpu_addr]; } +/* #define S390_TCG_SMP_SUPPORT */ + static void s390_init_cpus(MachineState *machine) { int i; @@ -55,6 +58,13 @@ static void s390_init_cpus(MachineState *machine) if (machine->cpu_model == NULL) { machine->cpu_model = s390_default_cpu_model_name(); } +#ifndef S390_TCG_SMP_SUPPORT + if (tcg_enabled() && max_cpus > 1) { + error_report("Number of SMP CPUs requested (%d) exceeds max CPUs " + "supported by TCG (1) on s390x", max_cpus); + exit(1); + } +#endif cpu_states = g_new0(S390CPU *, max_cpus);