From patchwork Wed Oct 4 18:43:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9985367 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5F60460586 for ; Wed, 4 Oct 2017 18:53:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E7A128BCA for ; Wed, 4 Oct 2017 18:53:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 42F3128BEA; Wed, 4 Oct 2017 18:53:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BE5E228BCA for ; Wed, 4 Oct 2017 18:53:12 +0000 (UTC) Received: from localhost ([::1]:36475 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dzonA-0007BP-1r for patchwork-qemu-devel@patchwork.kernel.org; Wed, 04 Oct 2017 14:53:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38369) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dzoe3-0008LS-Lv for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dzoe2-0002uZ-UT for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:47 -0400 Received: from mail-qt0-x22a.google.com ([2607:f8b0:400d:c0d::22a]:48046) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dzoe2-0002ts-QP for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:46 -0400 Received: by mail-qt0-x22a.google.com with SMTP id z50so16036423qtj.4 for ; Wed, 04 Oct 2017 11:43:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RF27WMiW7xZoIZt9j6TbVCEpaATPf5edbCN/DE5E1gw=; b=I33H4hweFXN3RMlvsEC/q9YeaZzuO+HqSOX7LDxROMvhHx+1kw0laz706mLw6Hxpcs BWNFqluoclCcoHP/scE7DaFPijTzkkbtqVhzbU1eFDuirAvSRoN3uckucEnsaosbYmRY jQYHlsZoacmhd3l60eNcwquL76hRXSSYF1d6I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RF27WMiW7xZoIZt9j6TbVCEpaATPf5edbCN/DE5E1gw=; b=Y8r5ezjSuuO6YyO/Te3fasWl94BulpdSexgfGEbahO37kWz4w4Y36y0ttakeJR3IJX w5Z+cMRQ9Ce6jEcBKr5bH3IVoEKn05N05Eve48kOGc5kfVRuccTp1t5OXCjZI3rI0EP4 89K/MlWZQ0pI6f0u0urWn+5zbWXK/pUDybEEfbtuuzQ5ZjM9zfyUmUsGi0CrEFoBbB6T oJajeSW9UG1Tdicoe9Hyq1fXU2DTjAUohc5CR/HlsFTaD/KvUTYB1MYVyFJip6ChO9wi RrSNFVViqAkBAhshrp/55a9p+D5ybBorDfaxYAA9U5NrCQlVxOcfyyTDOf91+8A28XWO MGfw== X-Gm-Message-State: AMCzsaUXe5R9qslhpTOXEQjwstbLaHy7SuLrkm0TMxqAbOC4qUfa9Cu5 szv/nJ4wIY+PVK8IEvVFZRzC4LCCFnY= X-Google-Smtp-Source: AOwi7QA2M7R3rHotspdsBi/FQ2mWzmsPm9d5scZqPCeTZJpdQlpzY3xQTxoA8Za+GaYAphr5Qe+PKQ== X-Received: by 10.129.110.133 with SMTP id j127mr4010605ywc.305.1507142626013; Wed, 04 Oct 2017 11:43:46 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2606:a000:7a4a:b100::1b]) by smtp.gmail.com with ESMTPSA id o64sm3020464ywe.12.2017.10.04.11.43.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Oct 2017 11:43:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 4 Oct 2017 14:43:25 -0400 Message-Id: <20171004184325.24157-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171004184325.24157-1-richard.henderson@linaro.org> References: <20171004184325.24157-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::22a Subject: [Qemu-devel] [PATCH v1 12/12] target/arm: Decode aa32 armv8.3 2-reg-index X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Richard Henderson --- target/arm/translate.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index 48f30e2621..50ef2f1f21 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7693,6 +7693,53 @@ static int disas_neon_insn_cp8_3same(DisasContext *s, uint32_t insn) return 0; } +/* ARMv8.3 reclaims a portion of the CDP2 coprocessor 8 space. */ + +static int disas_neon_insn_cp8_index(DisasContext *s, uint32_t insn) +{ + int rd, rn, rm, rot, size, opr_sz; + TCGv_ptr fpst; + bool q; + + /* FIXME: this access check should not take precedence over UNDEF + * for invalid encodings; we will generate incorrect syndrome information + * for attempts to execute invalid vfp/neon encodings with FP disabled. + */ + if (s->fp_excp_el) { + gen_exception_insn(s, 4, EXCP_UDEF, + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); + return 0; + } + if (!s->vfp_enabled || !arm_dc_feature(s, ARM_FEATURE_V8_FCMA)) { + return 1; + } + + q = extract32(insn, 6, 1); + size = extract32(insn, 23, 1); + + if (size == 0) { /* FIXME: fp16 support */ + return 1; + } + + VFP_DREG_D(rd, insn); + VFP_DREG_N(rn, insn); + VFP_DREG_M(rm, insn); + if ((rd | rn) & q) { + return 1; + } + + /* This entire space is VCMLA (indexed). */ + rot = extract32(insn, 20, 2); + opr_sz = (1 + q) * 8; + fpst = get_fpstatus_ptr(1); + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, rd), + vfp_reg_offset(1, rn), + vfp_reg_offset(1, rm), fpst, + opr_sz, opr_sz, rot, gen_helper_gvec_fcmlas_idx); + tcg_temp_free_ptr(fpst); + return 0; +} + static int disas_coproc_insn(DisasContext *s, uint32_t insn) { int cpnum, is64, crn, crm, opc1, opc2, isread, rt, rt2; @@ -8414,6 +8461,12 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) goto illegal_op; } return; + } else if ((insn & 0x0f000f10) == 0x0e000800) { + /* ARMv8.3 neon cdp2 coprocessor 8 extension. */ + if (disas_neon_insn_cp8_index(s, insn)) { + goto illegal_op; + } + return; } else if ((insn & 0x0fe00000) == 0x0c400000) { /* Coprocessor double register transfer. */ ARCH(5TE);