@@ -257,7 +257,7 @@ int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp)
}
irq = irq_hint;
} else {
- irq = xic->irq_alloc_block(ics->xics, 1, 0);
+ irq = xic->irq_alloc_block(ics->xics, 1, 0, lsi);
if (irq < 0) {
error_setg(errp, "can't allocate IRQ: no IRQ left");
return -1;
@@ -291,9 +291,9 @@ int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi,
if (align) {
assert((num == 1) || (num == 2) || (num == 4) ||
(num == 8) || (num == 16) || (num == 32));
- first = xic->irq_alloc_block(ics->xics, num, num);
+ first = xic->irq_alloc_block(ics->xics, num, num, lsi);
} else {
- first = xic->irq_alloc_block(ics->xics, num, 0);
+ first = xic->irq_alloc_block(ics->xics, num, 0, lsi);
}
if (first < 0) {
error_setg(errp, "can't find a free %d-IRQ block", num);
@@ -1696,6 +1696,13 @@ static const VMStateDescription vmstate_spapr_patb_entry = {
},
};
+/*
+ * Let's provision 4 LSIs per PHBs
+ */
+#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
+ SPAPR_PCI_MEM64_WIN_SIZE - 1)
+#define SPAPR_MAX_LSI (SPAPR_MAX_PHBS * 4)
+
static bool spapr_irq_map_needed(void *opaque)
{
sPAPRMachineState *spapr = opaque;
@@ -3523,8 +3530,6 @@ static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index,
* 1TiB 64-bit MMIO windows for each PHB.
*/
const uint64_t base_buid = 0x800000020000000ULL;
-#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
- SPAPR_PCI_MEM64_WIN_SIZE - 1)
int i;
/* Sanity check natural alignments */
@@ -3583,18 +3588,32 @@ static bool spapr_irq_test(XICSFabric *xi, int irq)
return test_bit(srcno, spapr->irq_map);
}
-static int spapr_irq_alloc_block(XICSFabric *xi, int count, int align)
+/*
+ * Split the IRQ number space of the machine in two: first the LSIs
+ * and then the MSIs. This allows us to keep the LSI IRQ numbers in a
+ * well known range which is useful for PHB hotplug.
+ */
+static int spapr_irq_alloc_block(XICSFabric *xi, int count, int align, bool lsi)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(xi);
+ sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
int start = 0;
int srcno;
+ if (!lsi && !smc->pre_2_11_has_no_bitmap) {
+ start = SPAPR_MAX_LSI;
+ }
+
srcno = bitmap_find_next_zero_area(spapr->irq_map, spapr->nr_irqs, start,
count, align);
if (srcno == spapr->nr_irqs) {
return -1;
}
+ if (lsi && !smc->pre_2_11_has_no_bitmap && srcno >= SPAPR_MAX_LSI) {
+ return -1;
+ }
+
bitmap_set(spapr->irq_map, srcno, count);
return srcno + spapr->irq_base;
}
@@ -177,7 +177,7 @@ typedef struct XICSFabricClass {
ICPState *(*icp_get)(XICSFabric *xi, int server);
/* IRQ allocator helpers */
bool (*irq_test)(XICSFabric *xi, int irq);
- int (*irq_alloc_block)(XICSFabric *xi, int count, int align);
+ int (*irq_alloc_block)(XICSFabric *xi, int count, int align, bool lsi);
void (*irq_free_block)(XICSFabric *xi, int irq, int num);
} XICSFabricClass;
The nature of an interrupt, MSI or LSI, is stored under the flag attribute of the ICSIRQState array. To reduce the use of this array and consequently of the ICSState object (needed to introduce for the new XIVE model), we choose to split the IRQ number space of the machine in two: first the LSIs and then the MSIs. This also has the benefit to keep the LSI IRQ numbers in a well known range which will be useful for PHB hotplug. For compatibility with older machines, we use the machine class flag 'pre_2_11_has_no_bitmap'. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/intc/xics_spapr.c | 6 +++--- hw/ppc/spapr.c | 25 ++++++++++++++++++++++--- include/hw/ppc/xics.h | 2 +- 3 files changed, 26 insertions(+), 7 deletions(-)