From patchwork Mon Jan 29 16:52:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cornelia Huck X-Patchwork-Id: 10190121 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 330666020C for ; Mon, 29 Jan 2018 16:53:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27F1E28112 for ; Mon, 29 Jan 2018 16:53:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1CC62284FC; Mon, 29 Jan 2018 16:53:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 595C328112 for ; Mon, 29 Jan 2018 16:53:41 +0000 (UTC) Received: from localhost ([::1]:50404 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1egCge-0002kR-J0 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 29 Jan 2018 11:53:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54616) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1egCfL-0001fK-B0 for qemu-devel@nongnu.org; Mon, 29 Jan 2018 11:52:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1egCfJ-0006Oq-Me for qemu-devel@nongnu.org; Mon, 29 Jan 2018 11:52:19 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42634) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1egCfJ-0006OD-EU; Mon, 29 Jan 2018 11:52:17 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9EFE64E05D; Mon, 29 Jan 2018 16:52:16 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9CDDB60BF8; Mon, 29 Jan 2018 16:52:15 +0000 (UTC) From: Cornelia Huck To: qemu-s390x@nongnu.org, qemu-devel@nongnu.org Date: Mon, 29 Jan 2018 17:52:09 +0100 Message-Id: <20180129165210.21086-2-cohuck@redhat.com> In-Reply-To: <20180129165210.21086-1-cohuck@redhat.com> References: <20180129165210.21086-1-cohuck@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 29 Jan 2018 16:52:16 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH RFC 1/2] s390x/tcg: wire up pci instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cornelia Huck , david@redhat.com, agraf@suse.de, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On s390x, pci support is implemented via a set of instructions (no mmio). Unfortunately, none of them are documented in the PoP; the code is based upon the existing implementation for KVM and the Linux zpci driver. Signed-off-by: Cornelia Huck --- target/s390x/helper.h | 9 ++++ target/s390x/insn-data.def | 13 +++++ target/s390x/misc_helper.c | 123 +++++++++++++++++++++++++++++++++++++++++++++ target/s390x/translate.c | 123 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 268 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 59a1d9869b..9887efbb3a 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -172,4 +172,13 @@ DEF_HELPER_2(stcrw, void, env, i64) DEF_HELPER_3(stsch, void, env, i64, i64) DEF_HELPER_3(tsch, void, env, i64, i64) DEF_HELPER_2(chsc, void, env, i64) + +DEF_HELPER_2(clp, void, env, i32) +DEF_HELPER_3(pcilg, void, env, i32, i32) +DEF_HELPER_3(pcistg, void, env, i32, i32) +DEF_HELPER_4(stpcifc, void, env, i32, i64, i32) +DEF_HELPER_3(sic, void, env, i64, i64) +DEF_HELPER_3(rpcit, void, env, i32, i32) +DEF_HELPER_5(pcistb, void, env, i32, i32, i64, i32) +DEF_HELPER_4(mpcifc, void, env, i32, i64, i32) #endif diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 11ee43dcbc..2ffc051072 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1067,4 +1067,17 @@ /* ??? Not listed in PoO ninth edition, but there's a linux driver that uses it: "A CHSC subchannel is usually present on LPAR only." */ C(0xb25f, CHSC, RRE, Z, 0, insn, 0, 0, chsc, 0) + +/* zPCI Instructions */ + /* None of these instructions are documented in the PoP, so this is all + based upon target/s390x/kvm.c and Linux code and likely incomplete */ + C(0xebd0, PCISTB, RSY_a, PCI, 0, 0, 0, 0, pcistb, 0) + C(0xebd1, SIC, RSY_a, PCI, 0, 0, 0, 0, sic, 0) + C(0xb9a0, CLP, RRF_c, PCI, 0, 0, 0, 0, clp, 0) + C(0xb9d0, PCISTG, RRE, PCI, 0, 0, 0, 0, pcistg, 0) + C(0xb9d2, PCILG, RRE, PCI, 0, 0, 0, 0, pcilg, 0) + C(0xb9d3, RPCIT, RRE, PCI, 0, 0, 0, 0, rpcit, 0) + C(0xe3d0, MPCIFC, RXY_a, PCI, 0, 0, 0, 0, mpcifc, 0) + C(0xe3d4, STPCIFC, RXY_a, PCI, 0, 0, 0, 0, stpcifc, 0) + #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 86da6aab7e..1271106628 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -36,6 +36,7 @@ #include "hw/s390x/ebcdic.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/sclp.h" +#include "hw/s390x/s390-pci-inst.h" #endif /* #define DEBUG_HELPER */ @@ -560,3 +561,125 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) env->regs[0] = deposit64(env->regs[0], 0, 8, (max_bytes / 8) - 1); return count_bytes >= max_bytes ? 0 : 3; } + +#ifndef CONFIG_USER_ONLY +void HELPER(clp)(CPUS390XState *env, uint32_t r2) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = clp_service_call(cpu, r2, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(pcilg)(CPUS390XState *env, uint32_t r1, uint32_t r2) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = pcilg_service_call(cpu, r1, r2, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(pcistg)(CPUS390XState *env, uint32_t r1, uint32_t r2) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = pcistg_service_call(cpu, r1, r2, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(stpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba, + uint32_t ar) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = stpcifc_service_call(cpu, r1, fiba, ar, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) +{ + int r; + + qemu_mutex_lock_iothread(); + r = css_do_sic(env, r1 & 0xffff, (r3 >> 27) & 0x7); + qemu_mutex_unlock_iothread(); + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(rpcit)(CPUS390XState *env, uint32_t r1, uint32_t r2) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = rpcit_service_call(cpu, r1, r2, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(pcistb)(CPUS390XState *env, uint32_t r1, uint32_t r3, + uint64_t gaddr, uint32_t ar) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = pcistb_service_call(cpu, r1, r3, gaddr, ar, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} + +void HELPER(mpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba, + uint32_t ar) +{ + S390CPU *cpu = s390_env_get_cpu(env); + int r = -1; + + if (s390_has_feat(S390_FEAT_ZPCI)) { + qemu_mutex_lock_iothread(); + r = mpcifc_service_call(cpu, r1, fiba, ar, GETPC()); + qemu_mutex_unlock_iothread(); + } + if (r) { + s390_program_interrupt(env, PGM_OPERATION, 4, GETPC()); + } +} +#endif diff --git a/target/s390x/translate.c b/target/s390x/translate.c index df0b41606d..b73f7143db 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -4777,6 +4777,128 @@ static ExitStatus op_zero2(DisasContext *s, DisasOps *o) return NO_EXIT; } +#ifndef CONFIG_USER_ONLY +static ExitStatus op_clp(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2)); + + check_privileged(s); + gen_helper_clp(cpu_env, r2); + tcg_temp_free_i32(r2); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_pcilg(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2)); + + check_privileged(s); + gen_helper_pcilg(cpu_env, r1, r2); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r2); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_pcistg(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2)); + + check_privileged(s); + gen_helper_pcistg(cpu_env, r1, r2); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r2); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_stpcifc(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + int b2 = get_field(s->fields, b2); + int d2 = get_field(s->fields, d2); + TCGv_i64 addr; + TCGv_i32 ar; + + check_privileged(s); + addr = get_address(s, 0, b2, d2); + ar = tcg_const_i32(b2); + gen_helper_stpcifc(cpu_env, r1, addr, ar); + tcg_temp_free_i64(addr); + tcg_temp_free_i32(ar); + tcg_temp_free_i32(r1); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_sic(DisasContext *s, DisasOps *o) +{ + int r1 = get_field(s->fields, r1); + int r3 = get_field(s->fields, r3); + + check_privileged(s); + gen_helper_sic(cpu_env, regs[r1], regs[r3]); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_rpcit(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2)); + + check_privileged(s); + gen_helper_rpcit(cpu_env, r1, r2); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r2); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_pcistb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3)); + int b2 = get_field(s->fields, b2); + int d2 = get_field(s->fields, d2); + TCGv_i64 addr; + TCGv_i32 ar; + + check_privileged(s); + addr = get_address(s, 0, b2, d2); + ar = tcg_const_i32(b2); + gen_helper_pcistb(cpu_env, r1, r3, addr, ar); + tcg_temp_free_i64(addr); + tcg_temp_free_i32(ar); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r3); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_mpcifc(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + int b2 = get_field(s->fields, b2); + int d2 = get_field(s->fields, d2); + TCGv_i64 addr; + TCGv_i32 ar; + + check_privileged(s); + addr = get_address(s, 0, b2, d2); + ar = tcg_const_i32(b2); + gen_helper_mpcifc(cpu_env, r1, addr, ar); + tcg_temp_free_i64(addr); + tcg_temp_free_i32(ar); + tcg_temp_free_i32(r1); + set_cc_static(s); + return NO_EXIT; +} +#endif + /* ====================================================================== */ /* The "Cc OUTput" generators. Given the generated output (and in some cases the original inputs), update the various cc data structures in order to @@ -5708,6 +5830,7 @@ enum DisasInsnEnum { #define FAC_MSA4 S390_FEAT_MSA_EXT_4 /* msa-extension-4 facility */ #define FAC_MSA5 S390_FEAT_MSA_EXT_5 /* msa-extension-5 facility */ #define FAC_ECT S390_FEAT_EXTRACT_CPU_TIME +#define FAC_PCI S390_FEAT_ZPCI /* z/PCI facility */ static const DisasInsn insn_info[] = { #include "insn-data.def"