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DM2PR12MB0154; 20:sZDX/Jm4+yxHJPyhvmlxWAkuE0m+/y8F4wpiCXjHnzVuLnSKbw4uCUo3rMmfrjS/k9RRvZOtO5zT0bHsHe3i37hAXb1YDjzksXBTBrKNQj+4tSoPzX7bRsV7W6X1bmjQKwoRKeyhvHvFD6NgdKpzhpnptlpRDmXNlznmNnxGFmWabyuRuIGVBOR5OhkRaQOTF1K2/OI50l5mVDQghrX6v2jxdlKo55xxQHKCdMGDCb4oKbFeqfoCHf2z88Xa8Dn/ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jan 2018 17:41:49.6509 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d321eb75-45f0-4b20-b4c5-08d5673f9441 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR12MB0154 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.41.56 Subject: [Qemu-devel] [PATCH v6 03/23] exec: add debug version of physical memory read and write API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , Peter Maydell , Peter Crosthwaite , Eduardo Habkost , kvm@vger.kernel.org, Tom Lendacky , Stefan Hajnoczi , "Michael S. Tsirkin" , Richard Henderson , "Dr. David Alan Gilbert" , Brijesh Singh , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Adds the following new APIs - cpu_physical_memory_read_debug - cpu_physical_memory_write_debug - cpu_physical_memory_rw_debug - ldl_phys_debug - ldq_phys_debug Cc: Paolo Bonzini Cc: Peter Crosthwaite Cc: Richard Henderson Signed-off-by: Brijesh Singh Reviewed-by: Paolo Bonzini --- exec.c | 41 +++++++++++++++++++++++++++++++++++++++++ include/exec/cpu-common.h | 15 +++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/exec.c b/exec.c index 1919052b7385..49dabdbeecbd 100644 --- a/exec.c +++ b/exec.c @@ -3610,6 +3610,47 @@ void address_space_cache_destroy(MemoryRegionCache *cache) #define RCU_READ_UNLOCK() rcu_read_unlock() #include "memory_ldst.inc.c" +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint32_t val; + + /* set debug attrs to indicate memory access is from the debugger */ + attrs.debug = 1; + + cpu_physical_memory_rw_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 4, attrs, READ_DATA); + return tswap32(val); +} + +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint64_t val; + + /* set debug attrs to indicate memory access is from the debugger */ + attrs.debug = 1; + + cpu_physical_memory_rw_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 8, attrs, READ_DATA); + return val; +} + +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write) +{ + MemTxAttrs attrs; + + /* set debug attrs to indicate memory access is from the debugger */ + attrs.debug = 1; + + address_space_rw(&address_space_memory, addr, attrs, buf, len, is_write); +} + /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, int len, int is_write) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 74341b19d26a..fa01385d4f1b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -77,11 +77,26 @@ size_t qemu_ram_pagesize_largest(void); void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, int len, int is_write); +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, int len) { cpu_physical_memory_rw(addr, buf, len, 0); } +static inline void cpu_physical_memory_read_debug(hwaddr addr, + void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, buf, len, 0); +} +static inline void cpu_physical_memory_write_debug(hwaddr addr, + const void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1); +} +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr); +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr); + static inline void cpu_physical_memory_write(hwaddr addr, const void *buf, int len) {