From patchwork Mon Feb 12 03:40:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 10211743 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB57C60153 for ; Mon, 12 Feb 2018 03:42:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AA34F26E1A for ; Mon, 12 Feb 2018 03:42:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9F22F27E63; Mon, 12 Feb 2018 03:42:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E6A1B26E1A for ; Mon, 12 Feb 2018 03:42:51 +0000 (UTC) Received: from localhost ([::1]:34089 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1el511-0000fP-2x for patchwork-qemu-devel@patchwork.kernel.org; Sun, 11 Feb 2018 22:42:51 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44943) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1el4zL-0007hL-JA for qemu-devel@nongnu.org; Sun, 11 Feb 2018 22:41:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1el4zH-00067I-SR for qemu-devel@nongnu.org; Sun, 11 Feb 2018 22:41:07 -0500 Received: from ozlabs.org ([103.22.144.67]:42757) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1el4zG-00063u-V4; Sun, 11 Feb 2018 22:41:03 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3zfrzs605rz9t3C; Mon, 12 Feb 2018 14:40:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1518406857; bh=ut5JMd2CysqpPJYl7Led4uytJLVnDPKPgTdHOAmFw6Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oTsVIy1BC4FrWzw9nJ6dltiemrD9UA1MG+CvtXC9GsOXVndpgrnVkFWHf7EpSUitY Yjuk9lPbbOdxYHuJ76G/BTG+nfPfSFVpW4voFAcNVLdG4XUw0k7GWZ+wPCbz1ddv56 2vWw79IO4/oZkM0JrbA5fn2YuX0Qp1nhZ8ni327A= From: David Gibson To: peter.maydell@linaro.org Date: Mon, 12 Feb 2018 14:40:46 +1100 Message-Id: <20180212034054.23441-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180212034054.23441-1-david@gibson.dropbear.id.au> References: <20180212034054.23441-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 04/12] cuda: don't allow writes to port output pins X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, mark.cave-ayland@ilande.co.uk, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Mark Cave-Ayland Use the direction registers as a mask to ensure that only input pins are updated upon write. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/misc/macio/cuda.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 6631017ca2..eaa8924f49 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -359,11 +359,11 @@ static void cuda_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) switch(addr) { case CUDA_REG_B: - s->b = val; + s->b = (s->b & ~s->dirb) | (val & s->dirb); cuda_update(s); break; case CUDA_REG_A: - s->a = val; + s->a = (s->a & ~s->dira) | (val & s->dira); break; case CUDA_REG_DIRB: s->dirb = val;