diff mbox

[for-2.13,04/10] spapr: Set compatibility mode before the rest of spapr_cpu_reset()

Message ID 20180417071722.9399-5-david@gibson.dropbear.id.au (mailing list archive)
State New, archived
Headers show

Commit Message

David Gibson April 17, 2018, 7:17 a.m. UTC
Although the order doesn't really matter at the moment, it's possible
other initializastions could depend on the compatiblity mode, so make sure
we set it first in spapr_cpu_reset().

While we're at it drop the test against first_cpu.  Setting the compat mode
to the value it already has is redundant, but harmless, so we might as well
make a small simplification to the code.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/spapr_cpu_core.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

Comments

Greg Kurz April 20, 2018, 9:16 a.m. UTC | #1
On Tue, 17 Apr 2018 17:17:16 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:

> Although the order doesn't really matter at the moment, it's possible
> other initializastions could depend on the compatiblity mode, so make sure
> we set it first in spapr_cpu_reset().
> 
> While we're at it drop the test against first_cpu.  Setting the compat mode
> to the value it already has is redundant, but harmless, so we might as well
> make a small simplification to the code.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---

Reviewed-by: Greg Kurz <groug@kaod.org>

>  hw/ppc/spapr_cpu_core.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index f39d99a8da..2aab6ccd15 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -31,6 +31,11 @@ static void spapr_cpu_reset(void *opaque)
>  
>      cpu_reset(cs);
>  
> +    /* Set compatibility mode to match the boot CPU, which was either set
> +     * by the machine reset code or by CAS. This should never fail.
> +     */
> +    ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
> +
>      /* All CPUs start halted.  CPU0 is unhalted from the machine level
>       * reset code and the rest are explicitly started up by the guest
>       * using an RTAS call */
> @@ -43,12 +48,6 @@ static void spapr_cpu_reset(void *opaque)
>          env->spr[SPR_LPCR] &= ~pcc->lpcr_pm;
>      }
>  
> -    /* Set compatibility mode to match the boot CPU, which was either set
> -     * by the machine reset code or by CAS. This should never fail.
> -     */
> -    if (cs != first_cpu) {
> -        ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
> -    }
>  }
>  
>  static void spapr_cpu_destroy(PowerPCCPU *cpu)
David Gibson April 20, 2018, 10:48 a.m. UTC | #2
On Fri, Apr 20, 2018 at 11:16:27AM +0200, Greg Kurz wrote:
> On Tue, 17 Apr 2018 17:17:16 +1000
> David Gibson <david@gibson.dropbear.id.au> wrote:
> 
> > Although the order doesn't really matter at the moment, it's possible
> > other initializastions could depend on the compatiblity mode, so make sure
> > we set it first in spapr_cpu_reset().
> > 
> > While we're at it drop the test against first_cpu.  Setting the compat mode
> > to the value it already has is redundant, but harmless, so we might as well
> > make a small simplification to the code.
> > 
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> 
> Reviewed-by: Greg Kurz <groug@kaod.org>

Ta.  This one also doesn't really depend on the others, so I've merged
it into ppc-for-2.13.

> 
> >  hw/ppc/spapr_cpu_core.c | 11 +++++------
> >  1 file changed, 5 insertions(+), 6 deletions(-)
> > 
> > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> > index f39d99a8da..2aab6ccd15 100644
> > --- a/hw/ppc/spapr_cpu_core.c
> > +++ b/hw/ppc/spapr_cpu_core.c
> > @@ -31,6 +31,11 @@ static void spapr_cpu_reset(void *opaque)
> >  
> >      cpu_reset(cs);
> >  
> > +    /* Set compatibility mode to match the boot CPU, which was either set
> > +     * by the machine reset code or by CAS. This should never fail.
> > +     */
> > +    ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
> > +
> >      /* All CPUs start halted.  CPU0 is unhalted from the machine level
> >       * reset code and the rest are explicitly started up by the guest
> >       * using an RTAS call */
> > @@ -43,12 +48,6 @@ static void spapr_cpu_reset(void *opaque)
> >          env->spr[SPR_LPCR] &= ~pcc->lpcr_pm;
> >      }
> >  
> > -    /* Set compatibility mode to match the boot CPU, which was either set
> > -     * by the machine reset code or by CAS. This should never fail.
> > -     */
> > -    if (cs != first_cpu) {
> > -        ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
> > -    }
> >  }
> >  
> >  static void spapr_cpu_destroy(PowerPCCPU *cpu)
>
diff mbox

Patch

diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index f39d99a8da..2aab6ccd15 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -31,6 +31,11 @@  static void spapr_cpu_reset(void *opaque)
 
     cpu_reset(cs);
 
+    /* Set compatibility mode to match the boot CPU, which was either set
+     * by the machine reset code or by CAS. This should never fail.
+     */
+    ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
+
     /* All CPUs start halted.  CPU0 is unhalted from the machine level
      * reset code and the rest are explicitly started up by the guest
      * using an RTAS call */
@@ -43,12 +48,6 @@  static void spapr_cpu_reset(void *opaque)
         env->spr[SPR_LPCR] &= ~pcc->lpcr_pm;
     }
 
-    /* Set compatibility mode to match the boot CPU, which was either set
-     * by the machine reset code or by CAS. This should never fail.
-     */
-    if (cs != first_cpu) {
-        ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
-    }
 }
 
 static void spapr_cpu_destroy(PowerPCCPU *cpu)