From patchwork Tue May 1 14:22:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Koppelmann X-Patchwork-Id: 10374017 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 56944601C7 for ; Tue, 1 May 2018 14:25:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 47FBB28D33 for ; Tue, 1 May 2018 14:25:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4665728D37; Tue, 1 May 2018 14:25:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9B7A628D33 for ; Tue, 1 May 2018 14:25:18 +0000 (UTC) Received: from localhost ([::1]:42764 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDWDV-000682-I2 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 01 May 2018 10:25:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDWBC-0004uy-LH for qemu-devel@nongnu.org; Tue, 01 May 2018 10:22:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDWB9-000357-LH for qemu-devel@nongnu.org; Tue, 01 May 2018 10:22:54 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:51906) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDWB9-00033v-EM for qemu-devel@nongnu.org; Tue, 01 May 2018 10:22:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.uni-paderborn.de; s=20170601; h=References:In-Reply-To:Message-Id:Date :Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=CJzYV7RLyvHnNCPMoBPQ12LEavZUTCmIGY6+IxX5bXY=; b=R/Reb5OOcH4JtzaR9iPD6XrUo 0/dUizcjfzYygKdXyAlhSlzPI23zNYMMyQAoWvTgYXH4ojy1zd92NItf90zwbKbE5mr4ZlJu5Bi+H faOuFkshczwLHgxfXPxZ8GniHxlRNrfcqrr4zXmo9nQYNOJNKSrgQm6PE/C9yV4W3hXds=; From: Bastian Koppelmann To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 16:22:13 +0200 Message-Id: <20180501142222.19154-4-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180501142222.19154-1-kbastian@mail.uni-paderborn.de> References: <20180501142222.19154-1-kbastian@mail.uni-paderborn.de> X-IMT-Spam-Score: 0.0 () X-PMX-Version: 6.4.2.2738846, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2018.5.1.141817, AntiVirus-Engine: 5.49.1, AntiVirus-Data: 2018.3.29.5491001 X-IMT-Authenticated-Sender: uid=kbastian,ou=People,o=upb,c=de X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-devel] [RFC PATCH 03/12] tests/tcg/tricore: Add macros to easily create tests and first test 'abs' X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This kind of tests is inspired by the riscv-tests repository. This adds macros that makes it easy to create single instruction self containing tests. This is achieved by macros that create a test sequence for an instruction and check for a supplied correct value. If the value is correct the next instruction is tested. Otherwise we jump to fail handler that writes is test number as a status code back to qemu that then exits on that status code. If all tests pass we write back 0 as a status code and exit. Signed-off-by: Bastian Koppelmann --- tests/tcg/tricore/Makefile | 2 ++ tests/tcg/tricore/macros.h | 53 ++++++++++++++++++++++++++++++++++++++++++++ tests/tcg/tricore/test_abs.S | 8 +++++++ 3 files changed, 63 insertions(+) create mode 100644 tests/tcg/tricore/macros.h create mode 100644 tests/tcg/tricore/test_abs.S diff --git a/tests/tcg/tricore/Makefile b/tests/tcg/tricore/Makefile index 8c168d1062..a0e1f4b20d 100644 --- a/tests/tcg/tricore/Makefile +++ b/tests/tcg/tricore/Makefile @@ -8,6 +8,8 @@ ASFLAGS = SIM = ../../../tricore-softmmu/qemu-system-tricore SIMFLAGS = -M tricore_testboard -nographic -kernel +TESTCASES += test_abs.tst + all: build %.pS: %.S diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h new file mode 100644 index 0000000000..76c133132a --- /dev/null +++ b/tests/tcg/tricore/macros.h @@ -0,0 +1,53 @@ +/* Helpers */ +#define LI(reg, val) \ + mov.u reg, lo:val; \ + movh DREG_TEMP_LI, up:val; \ + or reg, reg, DREG_TEMP_LI; \ + +/* Address definitions */ +#define TESTDEV_ADDR 0xf0000000 +/* Register definitions */ +#define DREG_RS1 %d0 +#define DREG_CALC_RESULT %d1 +#define DREG_TEMP_LI %d10 +#define DREG_TEMP %d11 +#define DREG_TEST_NUM %d14 +#define DREG_CORRECT_RESULT %d15 + +#define DREG_DEV_ADDR %a15 + +/* Test case wrappers */ +#define TEST_CASE(num, testreg, correct, code...) \ +test_ ## num: \ + code; \ + LI(DREG_CORRECT_RESULT, correct) \ + mov DREG_TEST_NUM, num; \ + jne testreg, DREG_CORRECT_RESULT, fail \ + +/* Actual test case type + * e.g inst %dX, %dY -> TEST_D_D + * inst %dX, %dY, %dZ -> TEST_D_DD + * inst %eX, %dY, %dZ -> TEST_E_DD + */ +#define TEST_D_D(insn, num, result, rs1) \ + TEST_CASE(num, DREG_CALC_RESULT, result, \ + LI(DREG_RS1, rs1); \ + insn DREG_CALC_RESULT, DREG_RS1; \ + ) + +/* Pass/Fail handling part */ +#define TEST_PASSFAIL \ + j pass; \ +fail: \ + LI(DREG_TEMP, TESTDEV_ADDR) \ + mov.a DREG_DEV_ADDR, DREG_TEMP; \ + st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\ + debug; \ + j fail; \ +pass: \ + LI(DREG_TEMP, TESTDEV_ADDR) \ + mov.a DREG_DEV_ADDR, DREG_TEMP; \ + mov DREG_TEST_NUM, 0; \ + st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\ + debug; \ + j pass; diff --git a/tests/tcg/tricore/test_abs.S b/tests/tcg/tricore/test_abs.S new file mode 100644 index 0000000000..acc143901c --- /dev/null +++ b/tests/tcg/tricore/test_abs.S @@ -0,0 +1,8 @@ +#include "macros.h" +.text +.global _start +_start: + TEST_D_D(abs, 1, 0, 0) + + TEST_PASSFAIL +