diff mbox

[v1,12/29] target-microblaze: Remove pointer indirection for ld/st addresses

Message ID 20180503091922.28733-13-edgar.iglesias@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Edgar E. Iglesias May 3, 2018, 9:19 a.m. UTC
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/translate.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

Comments

Richard Henderson May 3, 2018, 6:14 p.m. UTC | #1
On 05/03/2018 02:19 AM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target/microblaze/translate.c | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)

Heh, right-o.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Alistair Francis May 3, 2018, 8:21 p.m. UTC | #2
On Thu, May 3, 2018 at 2:37 AM Edgar E. Iglesias <edgar.iglesias@gmail.com>
wrote:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>   target/microblaze/translate.c | 24 ++++++++++++------------
>   1 file changed, 12 insertions(+), 12 deletions(-)

> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index daed0b7e1f..5cc53eb035 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -848,7 +848,7 @@ static void dec_imm(DisasContext *dc)
>       dc->clear_imm = 0;
>   }

> -static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
> +static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 t)
>   {
>       bool extimm = dc->tb_flags & IMM_FLAG;
>       /* Should be set to true if r1 is used by loadstores.  */
> @@ -863,10 +863,10 @@ static inline void compute_ldst_addr(DisasContext
*dc, TCGv_i32 *t)
>       if (!dc->type_b) {
>           /* If any of the regs is r0, return the value of the other reg.
  */
>           if (dc->ra == 0) {
> -            tcg_gen_mov_i32(*t, cpu_R[dc->rb]);
> +            tcg_gen_mov_i32(t, cpu_R[dc->rb]);
>               return;
>           } else if (dc->rb == 0) {
> -            tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
> +            tcg_gen_mov_i32(t, cpu_R[dc->ra]);
>               return;
>           }

> @@ -874,27 +874,27 @@ static inline void compute_ldst_addr(DisasContext
*dc, TCGv_i32 *t)
>               stackprot = true;
>           }

> -        tcg_gen_add_i32(*t, cpu_R[dc->ra], cpu_R[dc->rb]);
> +        tcg_gen_add_i32(t, cpu_R[dc->ra], cpu_R[dc->rb]);

>           if (stackprot) {
> -            gen_helper_stackprot(cpu_env, *t);
> +            gen_helper_stackprot(cpu_env, t);
>           }
>           return;
>       }
>       /* Immediate.  */
>       if (!extimm) {
>           if (dc->imm == 0) {
> -            tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
> +            tcg_gen_mov_i32(t, cpu_R[dc->ra]);
>               return;
>           }
> -        tcg_gen_movi_i32(*t, (int32_t)((int16_t)dc->imm));
> -        tcg_gen_add_i32(*t, cpu_R[dc->ra], *t);
> +        tcg_gen_movi_i32(t, (int32_t)((int16_t)dc->imm));
> +        tcg_gen_add_i32(t, cpu_R[dc->ra], t);
>       } else {
> -        tcg_gen_add_i32(*t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
> +        tcg_gen_add_i32(t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
>       }

>       if (stackprot) {
> -        gen_helper_stackprot(cpu_env, *t);
> +        gen_helper_stackprot(cpu_env, t);
>       }
>       return;
>   }
> @@ -929,7 +929,7 @@ static void dec_load(DisasContext *dc)

>       t_sync_flags(dc);
>       addr = tcg_temp_new_i32();
> -    compute_ldst_addr(dc, &addr);
> +    compute_ldst_addr(dc, addr);

>       /*
>        * When doing reverse accesses we need to do two things.
> @@ -1041,7 +1041,7 @@ static void dec_store(DisasContext *dc)
>       sync_jmpstate(dc);
>       /* SWX needs a temp_local.  */
>       addr = ex ? tcg_temp_local_new_i32() : tcg_temp_new_i32();
> -    compute_ldst_addr(dc, &addr);
> +    compute_ldst_addr(dc, addr);

>       if (ex) { /* swx */
>           TCGv_i32 tval;
> --
> 2.14.1
diff mbox

Patch

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index daed0b7e1f..5cc53eb035 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -848,7 +848,7 @@  static void dec_imm(DisasContext *dc)
     dc->clear_imm = 0;
 }
 
-static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
+static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 t)
 {
     bool extimm = dc->tb_flags & IMM_FLAG;
     /* Should be set to true if r1 is used by loadstores.  */
@@ -863,10 +863,10 @@  static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
     if (!dc->type_b) {
         /* If any of the regs is r0, return the value of the other reg.  */
         if (dc->ra == 0) {
-            tcg_gen_mov_i32(*t, cpu_R[dc->rb]);
+            tcg_gen_mov_i32(t, cpu_R[dc->rb]);
             return;
         } else if (dc->rb == 0) {
-            tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
+            tcg_gen_mov_i32(t, cpu_R[dc->ra]);
             return;
         }
 
@@ -874,27 +874,27 @@  static inline void compute_ldst_addr(DisasContext *dc, TCGv_i32 *t)
             stackprot = true;
         }
 
-        tcg_gen_add_i32(*t, cpu_R[dc->ra], cpu_R[dc->rb]);
+        tcg_gen_add_i32(t, cpu_R[dc->ra], cpu_R[dc->rb]);
 
         if (stackprot) {
-            gen_helper_stackprot(cpu_env, *t);
+            gen_helper_stackprot(cpu_env, t);
         }
         return;
     }
     /* Immediate.  */
     if (!extimm) {
         if (dc->imm == 0) {
-            tcg_gen_mov_i32(*t, cpu_R[dc->ra]);
+            tcg_gen_mov_i32(t, cpu_R[dc->ra]);
             return;
         }
-        tcg_gen_movi_i32(*t, (int32_t)((int16_t)dc->imm));
-        tcg_gen_add_i32(*t, cpu_R[dc->ra], *t);
+        tcg_gen_movi_i32(t, (int32_t)((int16_t)dc->imm));
+        tcg_gen_add_i32(t, cpu_R[dc->ra], t);
     } else {
-        tcg_gen_add_i32(*t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
+        tcg_gen_add_i32(t, cpu_R[dc->ra], *(dec_alu_op_b(dc)));
     }
 
     if (stackprot) {
-        gen_helper_stackprot(cpu_env, *t);
+        gen_helper_stackprot(cpu_env, t);
     }
     return;
 }
@@ -929,7 +929,7 @@  static void dec_load(DisasContext *dc)
 
     t_sync_flags(dc);
     addr = tcg_temp_new_i32();
-    compute_ldst_addr(dc, &addr);
+    compute_ldst_addr(dc, addr);
 
     /*
      * When doing reverse accesses we need to do two things.
@@ -1041,7 +1041,7 @@  static void dec_store(DisasContext *dc)
     sync_jmpstate(dc);
     /* SWX needs a temp_local.  */
     addr = ex ? tcg_temp_local_new_i32() : tcg_temp_new_i32();
-    compute_ldst_addr(dc, &addr);
+    compute_ldst_addr(dc, addr);
 
     if (ex) { /* swx */
         TCGv_i32 tval;