diff mbox

[v1,27/29] target-microblaze: mmu: Add a configurable output address mask

Message ID 20180503091922.28733-28-edgar.iglesias@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Edgar E. Iglesias May 3, 2018, 9:19 a.m. UTC 
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Add a configurable output address mask, used to mimic the
configurable physical address bit width.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/cpu.c | 1 +
 target/microblaze/mmu.c | 1 +
 target/microblaze/mmu.h | 1 +
 3 files changed, 3 insertions(+)

Comments

Alistair Francis May 3, 2018, 10:02 p.m. UTC | #1 
On Thu, May 3, 2018 at 2:32 AM Edgar E. Iglesias <edgar.iglesias@gmail.com>
wrote:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

> Add a configurable output address mask, used to mimic the
> configurable physical address bit width.

> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>   target/microblaze/cpu.c | 1 +
>   target/microblaze/mmu.c | 1 +
>   target/microblaze/mmu.h | 1 +
>   3 files changed, 3 insertions(+)

> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index 2b3f8fa374..d0649fdaaa 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -128,6 +128,7 @@ static void mb_cpu_reset(CPUState *s)
>       env->mmu.c_mmu = 3;
>       env->mmu.c_mmu_tlb_access = 3;
>       env->mmu.c_mmu_zones = 16;
> +    env->mmu.c_addr_mask = MAKE_64BIT_MASK(0, cpu->cfg.addr_size);
>   #endif
>   }

> diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
> index a379968618..166c79908c 100644
> --- a/target/microblaze/mmu.c
> +++ b/target/microblaze/mmu.c
> @@ -164,6 +164,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
>               tlb_rpn = d & TLB_RPN_MASK;

>               lu->vaddr = tlb_tag;
> +            lu->paddr = tlb_rpn & mmu->c_addr_mask;
>               lu->paddr = tlb_rpn;
>               lu->size = tlb_size;
>               lu->err = ERR_HIT;
> diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
> index 1714caf82e..9fbdf38f36 100644
> --- a/target/microblaze/mmu.h
> +++ b/target/microblaze/mmu.h
> @@ -72,6 +72,7 @@ struct microblaze_mmu
>       int c_mmu;
>       int c_mmu_tlb_access;
>       int c_mmu_zones;
> +    uint64_t c_addr_mask; /* Mask to apply to physical addresses.  */
>   };

>   struct microblaze_mmu_lookup
> --
> 2.14.1
diff mbox

Patch

diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 2b3f8fa374..d0649fdaaa 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -128,6 +128,7 @@  static void mb_cpu_reset(CPUState *s)
     env->mmu.c_mmu = 3;
     env->mmu.c_mmu_tlb_access = 3;
     env->mmu.c_mmu_zones = 16;
+    env->mmu.c_addr_mask = MAKE_64BIT_MASK(0, cpu->cfg.addr_size);
 #endif
 }
 
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index a379968618..166c79908c 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -164,6 +164,7 @@  unsigned int mmu_translate(struct microblaze_mmu *mmu,
             tlb_rpn = d & TLB_RPN_MASK;
 
             lu->vaddr = tlb_tag;
+            lu->paddr = tlb_rpn & mmu->c_addr_mask;
             lu->paddr = tlb_rpn;
             lu->size = tlb_size;
             lu->err = ERR_HIT;
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 1714caf82e..9fbdf38f36 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -72,6 +72,7 @@  struct microblaze_mmu
     int c_mmu;
     int c_mmu_tlb_access;
     int c_mmu_zones;
+    uint64_t c_addr_mask; /* Mask to apply to physical addresses.  */
 };
 
 struct microblaze_mmu_lookup