From patchwork Tue May 29 22:03:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhijian Li (Fujitsu)\" via" X-Patchwork-Id: 10437223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1C768601C7 for ; Tue, 29 May 2018 22:07:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 077E828927 for ; Tue, 29 May 2018 22:07:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EEE132892D; Tue, 29 May 2018 22:07:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A24C128927 for ; Tue, 29 May 2018 22:07:05 +0000 (UTC) Received: from localhost ([::1]:35236 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fNmlk-0008Mq-O3 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 29 May 2018 18:07:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41858) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fNmjD-0007GL-NM for qemu-devel@nongnu.org; Tue, 29 May 2018 18:04:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fNmjC-0007qT-RL for qemu-devel@nongnu.org; Tue, 29 May 2018 18:04:27 -0400 Received: from smtp18.mail.ru ([94.100.176.155]:44936) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fNmjC-0007ps-Jj for qemu-devel@nongnu.org; Tue, 29 May 2018 18:04:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=6KXYqeYe69V0T6M3KqL8LrPPehYktuPCaBrjiIvYFqw=; b=oEr3oSbc5Uh+QTvypNf5EiGTLScaH8cBkjietLujuUrwTkvvpUkS6tOY5l1xFId4zHOL9UY9BHLyUH2pwUsQfjqSoM7as46Ke2Sqmv1k7eCmb8hz2spAa2KCeO+yQ2cpNEYIH29f+DRje+5766+kqxnpUfNIgVBEz4TUddcsxYI=; Received: by smtp18.mail.ru with esmtpa (envelope-from ) id 1fNmjA-00076p-QT; Wed, 30 May 2018 01:04:25 +0300 To: qemu-devel Date: Wed, 30 May 2018 01:03:36 +0300 Message-Id: <20180529220338.10879-2-jusual@mail.ru> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180529220338.10879-1-jusual@mail.ru> References: <20180529220338.10879-1-jusual@mail.ru> Authentication-Results: smtp18.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-7FA49CB5: 0D63561A33F958A50A986AC80C43E4006F0765A1669F95CCB164F540FB2E6CA1725E5C173C3A84C3A2CE164612F1211F25C01993F489E81A9EF166FBCB559E95C4224003CC836476C0CAF46E325F83A50BF2EBBBDD9D6B0FECB2555BB02FD5A93B503F486389A921A5CC5B56E945C8DA X-Mailru-Sender: 7766D515518070DE138AAC7428EA760D7C1C1BBCE7BE7AE3C98D1DDFCB1AABACC655969879B08F797C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.176.155 Subject: [Qemu-devel] [RFC 1/3] hw/arm/nrf51_soc: Fix compilation and memory regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Julia Suvorova via Qemu-devel From: "Zhijian Li (Fujitsu)\" via" Reply-To: Julia Suvorova Cc: Peter Maydell , Jim Mussared , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Stefan Hajnoczi , Joel Stanley , Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP nRF51 SoC implementation is intended for the BBC Micro:bit board, which has 256 KB flash and 16 KB RAM. Added FICR defines. Signed-off-by: Julia Suvorova --- hw/arm/nrf51_soc.c | 12 +++++++----- include/hw/arm/nrf51_soc.h | 1 + 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index e59ba7079f..6fe06dcfd2 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -26,15 +26,17 @@ #define IOMEM_SIZE 0x20000000 #define FLASH_BASE 0x00000000 -#define FLASH_SIZE (144 * 1024) +#define FLASH_SIZE (256 * 1024) + +#define FICR_BASE 0x10000000 +#define FICR_SIZE 0x100 #define SRAM_BASE 0x20000000 -#define SRAM_SIZE (6 * 1024) +#define SRAM_SIZE (16 * 1024) static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) { NRF51State *s = NRF51_SOC(dev_soc); - DeviceState *nvic; Error *err = NULL; /* IO space */ @@ -69,8 +71,8 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(system_memory, SRAM_BASE, sram); /* TODO: implement a cortex m0 and update this */ - nvic = armv7m_init(get_system_memory(), FLASH_SIZE, 96, - s->kernel_filename, ARM_CPU_TYPE_NAME("cortex-m3")); + s->nvic = armv7m_init(get_system_memory(), FLASH_SIZE, 96, + s->kernel_filename, ARM_CPU_TYPE_NAME("cortex-m3")); } static Property nrf51_soc_properties[] = { diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 5431d200f8..a6bbe9f108 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -23,6 +23,7 @@ typedef struct NRF51State { /*< public >*/ char *kernel_filename; + DeviceState *nvic; MemoryRegion iomem; } NRF51State;