From patchwork Mon Jul 23 20:17:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Roth X-Patchwork-Id: 10541029 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7C83112E for ; Mon, 23 Jul 2018 21:17:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B6E88284FF for ; Mon, 23 Jul 2018 21:17:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB5842850F; Mon, 23 Jul 2018 21:17:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 52A56284FF for ; Mon, 23 Jul 2018 21:17:01 +0000 (UTC) Received: from localhost ([::1]:36704 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fhiCS-0004JN-E3 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 23 Jul 2018 17:17:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fhhKZ-0003nN-Av for qemu-devel@nongnu.org; Mon, 23 Jul 2018 16:21:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fhhKY-0005J0-BC for qemu-devel@nongnu.org; Mon, 23 Jul 2018 16:21:19 -0400 Received: from mail-oi0-x229.google.com ([2607:f8b0:4003:c06::229]:43125) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fhhKY-0005Ik-6B; Mon, 23 Jul 2018 16:21:18 -0400 Received: by mail-oi0-x229.google.com with SMTP id b15-v6so3470027oib.10; Mon, 23 Jul 2018 13:21:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5EtukpyyXUOV7ONYgbqzmLjH+V7MTKyMAm/HcGek7mk=; b=X7PtdSc2ReX4Et6Liv8KRz+LO1qLZ9a8msaDEyE9QbMXJxne/WMxf59Dhk2+GtvQPK e7GZCIHVhMmx5FkBqkohY4aHhS328wIoP9KmG09GJPo9nN/xtrNCvLVNlY4jxfmYniUn lWbWwNMTQbxNb9wjN5RORQXr09tGPkI3Sg4W9S0GzsDVR+22He+Fql/9ASUBgf4wL2+z 3V5Iyx/tcklfuDXSN4goaeUZL4Hg88JSSExAqqiYExQLoCk4Wkm8J6LY5fpNQYnVipej UmRJbbkdantZrEqIYrwMyvqfu3ua5wP+cLPXpVtmM86vonj1PaBacTSZG5ihqTWmMKyZ zZUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=5EtukpyyXUOV7ONYgbqzmLjH+V7MTKyMAm/HcGek7mk=; b=PBlWYsYfjIL688oZs23qDSjn1v2j/o70yozh3ODnzvrVGm2vzEgzFtICLajP/jY6av Jkb+9IVdSR8Pu7IoPkD2HSQa1xG9Q8/8ib95dlnnb7SMVd6vmEtvYP+K47cBhuY78Cvp NvJgVcZMYlNOPR1iOLGL8WsDAb5ISDJf8b2U19GPmwHl0DMAwVy7V8RCLgy7+MsSqeA8 WHAwK3FAjjF+Wbok+nAEQ1gqyt2w8+T6Z2AqEWZ0j53hdmKDYDGhdmB7DLn1F4NTxl5A LddJjPiGY5pdhjzXoCfNJZsTycr3frGAmDyZwdDl4o4ddpFlMnclMYxWArg2mK5h4PUP Bujw== X-Gm-Message-State: AOUpUlFO8asVztM8MGnulaK/O8BMInPF6PV2xsZSZV3Cs/pjpLDVtqz1 1QiGXa8udJ79P+jO8LINnR48tk9ORwDPgg== X-Google-Smtp-Source: AAOMgpfv1WvIxTCONxJA5nPauZujBLWHgqIV++FuBIPzQ73q0kkRCOt6+T0RO3XrUPmVnmKqvH3MPA== X-Received: by 2002:aca:1b11:: with SMTP id b17-v6mr307593oib.178.1532377275864; Mon, 23 Jul 2018 13:21:15 -0700 (PDT) Received: from localhost (76-251-165-188.lightspeed.austtx.sbcglobal.net. [76.251.165.188]) by smtp.gmail.com with ESMTPSA id o206-v6sm8223354oif.7.2018.07.23.13.21.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Jul 2018 13:21:14 -0700 (PDT) From: Michael Roth To: qemu-devel@nongnu.org Date: Mon, 23 Jul 2018 15:17:23 -0500 Message-Id: <20180723201748.25573-75-mdroth@linux.vnet.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723201748.25573-1-mdroth@linux.vnet.ibm.com> References: <20180723201748.25573-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4003:c06::229 Subject: [Qemu-devel] [PATCH 74/99] target/arm: Clear SVE high bits for FMOV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Richard Henderson Use write_fp_dreg and clear_vec_high to zero the bits that need zeroing for these cases. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20180502221552.3873-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell (cherry picked from commit 9a9f1f59521f46e8ff4527d9a2b52f83577e2aa3) Signed-off-by: Michael Roth --- target/arm/translate-a64.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 3c4c9b9fdc..639cd95772 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5438,31 +5438,24 @@ static void handle_fmov(DisasContext *s, int rd, int rn, int type, bool itof) if (itof) { TCGv_i64 tcg_rn = cpu_reg(s, rn); + TCGv_i64 tmp; switch (type) { case 0: - { /* 32 bit */ - TCGv_i64 tmp = tcg_temp_new_i64(); + tmp = tcg_temp_new_i64(); tcg_gen_ext32u_i64(tmp, tcg_rn); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_movi_i64(tmp, 0); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); + write_fp_dreg(s, rd, tmp); tcg_temp_free_i64(tmp); break; - } case 1: - { /* 64 bit */ - TCGv_i64 tmp = tcg_const_i64(0); - tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); - tcg_temp_free_i64(tmp); + write_fp_dreg(s, rd, tcg_rn); break; - } case 2: /* 64 bit to top half. */ tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); + clear_vec_high(s, true, rd); break; } } else {