| Message ID | 20180814013801.26036-4-cota@braap.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86_64 mttcg | expand |
On 14/08/2018 03:38, Emilio G. Cota wrote: > Needed for MTTCG. > > Signed-off-by: Emilio G. Cota <cota@braap.org> Why not always use TLS, even in user-mode? Paolo > --- > target/i386/translate.c | 24 ++++++++++++++++-------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/target/i386/translate.c b/target/i386/translate.c > index 07d185e7b6..f4c2a41f8f 100644 > --- a/target/i386/translate.c > +++ b/target/i386/translate.c > @@ -71,26 +71,34 @@ > > //#define MACRO_TEST 1 > > +/* we need thread-local storage for mttcg */ > +#ifdef CONFIG_USER_ONLY > +#define I386_THREAD > +#else > +#define I386_THREAD __thread > +#endif > + > /* global register indexes */ > -static TCGv cpu_A0; > -static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT; > +static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2; > static TCGv_i32 cpu_cc_op; > static TCGv cpu_regs[CPU_NB_REGS]; > static TCGv cpu_seg_base[6]; > static TCGv_i64 cpu_bndl[4]; > static TCGv_i64 cpu_bndu[4]; > /* local temps */ > -static TCGv cpu_T0, cpu_T1; > +static I386_THREAD TCGv cpu_cc_srcT; > +static I386_THREAD TCGv cpu_A0; > +static I386_THREAD TCGv cpu_T0, cpu_T1; > /* local register indexes (only used inside old micro ops) */ > -static TCGv cpu_tmp0, cpu_tmp4; > -static TCGv_ptr cpu_ptr0, cpu_ptr1; > -static TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32; > -static TCGv_i64 cpu_tmp1_i64; > +static I386_THREAD TCGv cpu_tmp0, cpu_tmp4; > +static I386_THREAD TCGv_ptr cpu_ptr0, cpu_ptr1; > +static I386_THREAD TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32; > +static I386_THREAD TCGv_i64 cpu_tmp1_i64; > > #include "exec/gen-icount.h" > > #ifdef TARGET_X86_64 > -static int x86_64_hregs; > +static I386_THREAD int x86_64_hregs; > #endif > > typedef struct DisasContext { >
On Tue, Aug 14, 2018 at 08:31:02 +0200, Paolo Bonzini wrote: > On 14/08/2018 03:38, Emilio G. Cota wrote: > > Needed for MTTCG. > > > > Signed-off-by: Emilio G. Cota <cota@braap.org> > > Why not always use TLS, even in user-mode? To avoid TLS waste; user-mode uses a single TCGContext, so a single copy of these variables is all that's needed because code generation is serialized with a lock. If in user-mode we just have a few threads it'd be no big deal, but apps can easily spawn thousands of threads. E.
diff --git a/target/i386/translate.c b/target/i386/translate.c index 07d185e7b6..f4c2a41f8f 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -71,26 +71,34 @@ //#define MACRO_TEST 1 +/* we need thread-local storage for mttcg */ +#ifdef CONFIG_USER_ONLY +#define I386_THREAD +#else +#define I386_THREAD __thread +#endif + /* global register indexes */ -static TCGv cpu_A0; -static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT; +static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2; static TCGv_i32 cpu_cc_op; static TCGv cpu_regs[CPU_NB_REGS]; static TCGv cpu_seg_base[6]; static TCGv_i64 cpu_bndl[4]; static TCGv_i64 cpu_bndu[4]; /* local temps */ -static TCGv cpu_T0, cpu_T1; +static I386_THREAD TCGv cpu_cc_srcT; +static I386_THREAD TCGv cpu_A0; +static I386_THREAD TCGv cpu_T0, cpu_T1; /* local register indexes (only used inside old micro ops) */ -static TCGv cpu_tmp0, cpu_tmp4; -static TCGv_ptr cpu_ptr0, cpu_ptr1; -static TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32; -static TCGv_i64 cpu_tmp1_i64; +static I386_THREAD TCGv cpu_tmp0, cpu_tmp4; +static I386_THREAD TCGv_ptr cpu_ptr0, cpu_ptr1; +static I386_THREAD TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32; +static I386_THREAD TCGv_i64 cpu_tmp1_i64; #include "exec/gen-icount.h" #ifdef TARGET_X86_64 -static int x86_64_hregs; +static I386_THREAD int x86_64_hregs; #endif typedef struct DisasContext {
Needed for MTTCG. Signed-off-by: Emilio G. Cota <cota@braap.org> --- target/i386/translate.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-)