diff mbox series

target/xtensa: fix s32c1i TCGMemOp flags

Message ID 20180911013211.27340-1-jcmvbkbc@gmail.com (mailing list archive)
State New, archived
Headers show
Series target/xtensa: fix s32c1i TCGMemOp flags | expand

Commit Message

Max Filippov Sept. 11, 2018, 1:32 a.m. UTC 
s32c1i must load and store value with target endianness, not host.
This results in an infinite loop in atomic cmpxchg sequences when target
endianness doesn't match host endianness.

Fixes: 9fb40342d4b3 ("target/xtensa: support MTTCG")
Cc: qemu-stable@nongnu.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 target/xtensa/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson Sept. 12, 2018, 4:42 p.m. UTC | #1 
On 09/10/2018 06:32 PM, Max Filippov wrote:
> s32c1i must load and store value with target endianness, not host.
> This results in an infinite loop in atomic cmpxchg sequences when target
> endianness doesn't match host endianness.
> 
> Fixes: 9fb40342d4b3 ("target/xtensa: support MTTCG")
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
>  target/xtensa/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 25399058a0db..c626583cd952 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -2288,7 +2288,7 @@  static void translate_s32c1i(DisasContext *dc, const uint32_t arg[],
         gen_load_store_alignment(dc, 2, addr, true);
         gen_check_atomctl(dc, addr);
         tcg_gen_atomic_cmpxchg_i32(cpu_R[arg[0]], addr, cpu_SR[SCOMPARE1],
-                                   tmp, dc->cring, MO_32);
+                                   tmp, dc->cring, MO_TEUL);
         tcg_temp_free(addr);
         tcg_temp_free(tmp);
     }