From patchwork Tue Sep 11 20:28:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 10596277 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D56314E0 for ; Tue, 11 Sep 2018 20:30:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A9FA29E50 for ; Tue, 11 Sep 2018 20:30:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6EDD329E5E; Tue, 11 Sep 2018 20:30:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D741E29E17 for ; Tue, 11 Sep 2018 20:30:00 +0000 (UTC) Received: from localhost ([::1]:59336 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzpIO-0001ax-5N for patchwork-qemu-devel@patchwork.kernel.org; Tue, 11 Sep 2018 16:30:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58671) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzpGy-0000QJ-HP for qemu-devel@nongnu.org; Tue, 11 Sep 2018 16:28:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fzpGs-0002WE-8E for qemu-devel@nongnu.org; Tue, 11 Sep 2018 16:28:31 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:59885) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fzpGs-0002Vl-0r for qemu-devel@nongnu.org; Tue, 11 Sep 2018 16:28:26 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 63DB321FA4; Tue, 11 Sep 2018 16:28:25 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Tue, 11 Sep 2018 16:28:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=/8rJIp1k8PqO8x vqX+GVacF0npaQ5WGLucTJ3QVh6Xo=; b=vkvUCcYMEfI6pBWJz0cRQ9NIMtgwHY jRZrjiJpTuDGW5ItS/1OGflW7DKRTCsqVD03Y6zt3VAZXgSSorokMPkYqObdbYIl K8bHqsxq/9Y2Gmp8m44+b6jB/2qx3WWnNyi64ZXnwBmARS9IWCU/wsllVKGTTi+/ 4P/s3Y87npaDs= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=/8rJIp1k8PqO8xvqX+GVacF0npaQ5WGLucTJ3QVh6Xo=; b=o5ijprmF 0GUhcg6ubLty4e/D1Mbi+8mVOJER7UKp+Ztg9gVRAvXMXapl8i+JjgUNbYHcUZfi iDez1SUGA3gVzFubawNDu8glDEBEBKQUy9sL1TPvrcVHKjyU5nQFb/pDmdOeLR1o j5KMC3McJ3DwdLRfn4p+I0KMeHaqDuLHyEEWYmUU3pBAy3KwA8+KCSRQdvdopLqN H40fqnstGXlmF5I+O40BDEDrCU3c9pI8cqGz8qSqjNnFApSrdyHmYrX42rgrc78t WTTObzD6IyfUZJIhyZ66J5XIgwdjnBIscMUk+nx2lBYp+E09zrKpRuFDvqV/tHCP gsoSGp3tI4qESg== X-ME-Proxy: X-ME-Sender: Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id DE69010299; Tue, 11 Sep 2018 16:28:24 -0400 (EDT) From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Tue, 11 Sep 2018 16:28:11 -0400 Message-Id: <20180911202823.21657-2-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180911202823.21657-1-cota@braap.org> References: <20180911202823.21657-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH v3 01/13] target/i386: move cpu_cc_srcT to DisasContext X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9e?= , Eduardo Habkost , Peter Crosthwaite Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée --- target/i386/translate.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 1f9d1d9b24..e9f512472e 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -73,7 +73,7 @@ /* global register indexes */ static TCGv cpu_A0; -static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT; +static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2; static TCGv_i32 cpu_cc_op; static TCGv cpu_regs[CPU_NB_REGS]; static TCGv cpu_seg_base[6]; @@ -135,6 +135,10 @@ typedef struct DisasContext { int cpuid_ext3_features; int cpuid_7_0_ebx_features; int cpuid_xsave_features; + + /* TCG local temps */ + TCGv cc_srcT; + sigjmp_buf jmpbuf; } DisasContext; @@ -244,7 +248,7 @@ static void set_cc_op(DisasContext *s, CCOp op) tcg_gen_discard_tl(cpu_cc_src2); } if (dead & USES_CC_SRCT) { - tcg_gen_discard_tl(cpu_cc_srcT); + tcg_gen_discard_tl(s->cc_srcT); } if (op == CC_OP_DYNAMIC) { @@ -667,11 +671,11 @@ static inline void gen_op_testl_T0_T1_cc(void) tcg_gen_and_tl(cpu_cc_dst, cpu_T0, cpu_T1); } -static void gen_op_update_neg_cc(void) +static void gen_op_update_neg_cc(DisasContext *s) { tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); tcg_gen_neg_tl(cpu_cc_src, cpu_T0); - tcg_gen_movi_tl(cpu_cc_srcT, 0); + tcg_gen_movi_tl(s->cc_srcT, 0); } /* compute all eflags to cc_src */ @@ -742,7 +746,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) t1 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false); /* If no temporary was used, be careful not to alias t1 and t0. */ t0 = t1 == cpu_cc_src ? cpu_tmp0 : reg; - tcg_gen_mov_tl(t0, cpu_cc_srcT); + tcg_gen_mov_tl(t0, s->cc_srcT); gen_extu(size, t0); goto add_sub; @@ -899,7 +903,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) size = s->cc_op - CC_OP_SUBB; switch (jcc_op) { case JCC_BE: - tcg_gen_mov_tl(cpu_tmp4, cpu_cc_srcT); + tcg_gen_mov_tl(cpu_tmp4, s->cc_srcT); gen_extu(size, cpu_tmp4); t0 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false); cc = (CCPrepare) { .cond = TCG_COND_LEU, .reg = cpu_tmp4, @@ -912,7 +916,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) case JCC_LE: cond = TCG_COND_LE; fast_jcc_l: - tcg_gen_mov_tl(cpu_tmp4, cpu_cc_srcT); + tcg_gen_mov_tl(cpu_tmp4, s->cc_srcT); gen_exts(size, cpu_tmp4); t0 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, true); cc = (CCPrepare) { .cond = cond, .reg = cpu_tmp4, @@ -1309,11 +1313,11 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d) case OP_SUBL: if (s1->prefix & PREFIX_LOCK) { tcg_gen_neg_tl(cpu_T0, cpu_T1); - tcg_gen_atomic_fetch_add_tl(cpu_cc_srcT, cpu_A0, cpu_T0, + tcg_gen_atomic_fetch_add_tl(s1->cc_srcT, cpu_A0, cpu_T0, s1->mem_index, ot | MO_LE); - tcg_gen_sub_tl(cpu_T0, cpu_cc_srcT, cpu_T1); + tcg_gen_sub_tl(cpu_T0, s1->cc_srcT, cpu_T1); } else { - tcg_gen_mov_tl(cpu_cc_srcT, cpu_T0); + tcg_gen_mov_tl(s1->cc_srcT, cpu_T0); tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_T1); gen_op_st_rm_T0_A0(s1, ot, d); } @@ -1356,7 +1360,7 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d) break; case OP_CMPL: tcg_gen_mov_tl(cpu_cc_src, cpu_T1); - tcg_gen_mov_tl(cpu_cc_srcT, cpu_T0); + tcg_gen_mov_tl(s1->cc_srcT, cpu_T0); tcg_gen_sub_tl(cpu_cc_dst, cpu_T0, cpu_T1); set_cc_op(s1, CC_OP_SUBB + ot); break; @@ -4823,7 +4827,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_op_mov_reg_v(ot, rm, cpu_T0); } } - gen_op_update_neg_cc(); + gen_op_update_neg_cc(s); set_cc_op(s, CC_OP_SUBB + ot); break; case 4: /* mul */ @@ -5283,7 +5287,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } } tcg_gen_mov_tl(cpu_cc_src, oldv); - tcg_gen_mov_tl(cpu_cc_srcT, cmpv); + tcg_gen_mov_tl(s->cc_srcT, cmpv); tcg_gen_sub_tl(cpu_cc_dst, cmpv, oldv); set_cc_op(s, CC_OP_SUBB + ot); tcg_temp_free(oldv); @@ -8463,7 +8467,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) cpu_tmp4 = tcg_temp_new(); cpu_ptr0 = tcg_temp_new_ptr(); cpu_ptr1 = tcg_temp_new_ptr(); - cpu_cc_srcT = tcg_temp_local_new(); + dc->cc_srcT = tcg_temp_local_new(); } static void i386_tr_tb_start(DisasContextBase *db, CPUState *cpu)