From patchwork Tue Sep 25 07:56:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 10613601 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1838C161F for ; Tue, 25 Sep 2018 08:01:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10DAC299C8 for ; Tue, 25 Sep 2018 08:01:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04EAC29B28; Tue, 25 Sep 2018 08:01:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 63999299E3 for ; Tue, 25 Sep 2018 08:01:21 +0000 (UTC) Received: from localhost ([::1]:51534 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g4iHY-0001dw-Kr for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Sep 2018 04:01:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g4iDd-0006Ei-GB for qemu-devel@nongnu.org; Tue, 25 Sep 2018 03:57:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g4iDX-00047V-Mr for qemu-devel@nongnu.org; Tue, 25 Sep 2018 03:57:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45636) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g4iDO-00044p-7p for qemu-devel@nongnu.org; Tue, 25 Sep 2018 03:57:04 -0400 Received: from smtp.corp.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 777B1C049AD8 for ; Tue, 25 Sep 2018 07:57:00 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-56.phx2.redhat.com [10.3.116.56]) by smtp.corp.redhat.com (Postfix) with ESMTP id E673286212; Tue, 25 Sep 2018 07:56:53 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 3340F1751A; Tue, 25 Sep 2018 09:56:47 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 25 Sep 2018 09:56:46 +0200 Message-Id: <20180925075646.25114-6-kraxel@redhat.com> In-Reply-To: <20180925075646.25114-1-kraxel@redhat.com> References: <20180925075646.25114-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 25 Sep 2018 07:57:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 5/5] display/stdvga: add edid support. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds edid support to the qemu stdvga. It is turned off by default and can be enabled with the new edid property. The patch also adds xres and yres properties to specify the video mode you want the guest use. Works only with edid enabled and updated guest driver. The mmio bar of the stdvga has some unused address space at the start. It was reserved just in case it'll be needed for virtio, but it turned out to not be needed for that. So let's use that region to place the EDID data block there. Signed-off-by: Gerd Hoffmann --- docs/specs/standard-vga.txt | 2 +- hw/display/vga_int.h | 2 +- hw/display/vga-pci.c | 35 +++++++++++++++++++++++++++++++---- hw/display/virtio-vga.c | 2 +- 4 files changed, 34 insertions(+), 7 deletions(-) diff --git a/docs/specs/standard-vga.txt b/docs/specs/standard-vga.txt index 19d2a74509..18f75f1b30 100644 --- a/docs/specs/standard-vga.txt +++ b/docs/specs/standard-vga.txt @@ -61,7 +61,7 @@ MMIO area spec Likewise applies to the pci variant only for obvious reasons. -0000 - 03ff : reserved, for possible virtio extension. +0000 - 03ff : edid data blob. 0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1. word access is supported, bytes are written in little endia order (aka index port first), diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index 339661bc01..6e4fa48a79 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -197,6 +197,6 @@ void pci_std_vga_mmio_region_init(VGACommonState *s, Object *owner, MemoryRegion *parent, MemoryRegion *subs, - bool qext); + bool qext, bool edid); #endif diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index e9e62eac70..24ca1b3e1f 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -30,18 +30,22 @@ #include "ui/pixel_ops.h" #include "qemu/timer.h" #include "hw/loader.h" +#include "hw/display/edid.h" enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_MMIO = 1, PCI_VGA_FLAG_ENABLE_QEXT = 2, + PCI_VGA_FLAG_ENABLE_EDID = 3, }; typedef struct PCIVGAState { PCIDevice dev; VGACommonState vga; uint32_t flags; + qemu_edid_info edid_info; MemoryRegion mmio; - MemoryRegion mrs[3]; + MemoryRegion mrs[4]; + uint8_t edid[256]; } PCIVGAState; #define TYPE_PCI_VGA "pci-vga" @@ -195,8 +199,10 @@ void pci_std_vga_mmio_region_init(VGACommonState *s, Object *owner, MemoryRegion *parent, MemoryRegion *subs, - bool qext) + bool qext, bool edid) { + PCIVGAState *d = container_of(s, PCIVGAState, vga); + memory_region_init_io(&subs[0], owner, &pci_vga_ioport_ops, s, "vga ioports remapped", PCI_VGA_IOPORT_SIZE); memory_region_add_subregion(parent, PCI_VGA_IOPORT_OFFSET, @@ -213,6 +219,12 @@ void pci_std_vga_mmio_region_init(VGACommonState *s, memory_region_add_subregion(parent, PCI_VGA_QEXT_OFFSET, &subs[2]); } + + if (edid) { + qemu_edid_generate(d->edid, sizeof(d->edid), &d->edid_info); + qemu_edid_region_io(&subs[3], owner, d->edid, sizeof(d->edid)); + memory_region_add_subregion(parent, 0, &subs[3]); + } } static void pci_std_vga_realize(PCIDevice *dev, Error **errp) @@ -220,6 +232,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; bool qext = false; + bool edid = false; /* vga + console init */ vga_common_init(s, OBJECT(dev)); @@ -240,7 +253,11 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) qext = true; pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2); } - pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext); + if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) { + edid = true; + } + pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, + qext, edid); pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); } @@ -263,6 +280,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; bool qext = false; + bool edid = false; /* vga + console init */ vga_common_init(s, OBJECT(dev)); @@ -276,7 +294,10 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) qext = true; pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2); } - pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext); + if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) { + edid = true; + } + pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext, edid); pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); @@ -308,6 +329,9 @@ static Property vga_pci_properties[] = { DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true), DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), + DEFINE_PROP_BIT("edid", + PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), + DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false), DEFINE_PROP_END_OF_LIST(), }; @@ -316,6 +340,9 @@ static Property secondary_pci_properties[] = { DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16), DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), + DEFINE_PROP_BIT("edid", + PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), + DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 1e601c1a3b..ab2e369b28 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -153,7 +153,7 @@ static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp) /* add stdvga mmio regions */ pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar, - vvga->vga_mrs, true); + vvga->vga_mrs, true, false); vga->con = g->scanout[0].con; graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);