| Message ID | 20180928104319.3296-1-bigeasy@linutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i386: correct cpu_x86_cpuid(0xd) | expand |
On Fri, Sep 28, 2018 at 12:43:19PM +0200, Sebastian Andrzej Siewior wrote: > Intel SDM says for CPUID function 0DH, sub-function 0: > > | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an > | XSAVE area containing all the user state components supported by this > | processor. > | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an > | XSAVE area containing all the user state components corresponding to bits > | currently set in XCR0. > > Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> > --- > target/i386/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index f24295e6e4bb7..00c18444c0bac 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > *ecx = xsave_area_size(x86_cpu_xsave_components(cpu)); > *eax = env->features[FEAT_XSAVE_COMP_LO]; > *edx = env->features[FEAT_XSAVE_COMP_HI]; > - *ebx = *ecx; > + *ebx = xsave_area_size(env->xcr0); Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> For reference, KVM isn't affected by this bug because KVM kernel code updates CPUID data at runtime, at: int kvm_update_cpuid(struct kvm_vcpu *vcpu) { [...] best = kvm_find_cpuid_entry(vcpu, 0xD, 0); if (!best) { [...] } else { [...] best->ebx = xstate_required_size(vcpu->arch.xcr0, false); } [...] } > } else if (count == 1) { > *eax = env->features[FEAT_XSAVE]; > } else if (count < ARRAY_SIZE(x86_ext_save_areas)) { > -- > 2.19.0 >
On 2018-09-28 11:54:11 [-0300], Eduardo Habkost wrote: > On Fri, Sep 28, 2018 at 12:43:19PM +0200, Sebastian Andrzej Siewior wrote: > > Intel SDM says for CPUID function 0DH, sub-function 0: > > > > | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an > > | XSAVE area containing all the user state components supported by this > > | processor. > > | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an > > | XSAVE area containing all the user state components corresponding to bits > > | currently set in XCR0. > > > > Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> > > --- > > target/i386/cpu.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > > index f24295e6e4bb7..00c18444c0bac 100644 > > --- a/target/i386/cpu.c > > +++ b/target/i386/cpu.c > > @@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > > *ecx = xsave_area_size(x86_cpu_xsave_components(cpu)); > > *eax = env->features[FEAT_XSAVE_COMP_LO]; > > *edx = env->features[FEAT_XSAVE_COMP_HI]; > > - *ebx = *ecx; > > + *ebx = xsave_area_size(env->xcr0); > > Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> ping Sebastian
On 17/10/2018 20:12, Sebastian Andrzej Siewior wrote: > On 2018-09-28 11:54:11 [-0300], Eduardo Habkost wrote: >> On Fri, Sep 28, 2018 at 12:43:19PM +0200, Sebastian Andrzej Siewior wrote: >>> Intel SDM says for CPUID function 0DH, sub-function 0: >>> >>> | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an >>> | XSAVE area containing all the user state components supported by this >>> | processor. >>> | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an >>> | XSAVE area containing all the user state components corresponding to bits >>> | currently set in XCR0. >>> >>> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> >>> --- >>> target/i386/cpu.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >>> index f24295e6e4bb7..00c18444c0bac 100644 >>> --- a/target/i386/cpu.c >>> +++ b/target/i386/cpu.c >>> @@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, >>> *ecx = xsave_area_size(x86_cpu_xsave_components(cpu)); >>> *eax = env->features[FEAT_XSAVE_COMP_LO]; >>> *edx = env->features[FEAT_XSAVE_COMP_HI]; >>> - *ebx = *ecx; >>> + *ebx = xsave_area_size(env->xcr0); >> >> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> > > ping It's queued for my next pull request. Paolo
On 2018-10-17 20:40:17 [+0200], Paolo Bonzini wrote: > It's queued for my next pull request. thanks. > Paolo Sebastian
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f24295e6e4bb7..00c18444c0bac 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *ecx = xsave_area_size(x86_cpu_xsave_components(cpu)); *eax = env->features[FEAT_XSAVE_COMP_LO]; *edx = env->features[FEAT_XSAVE_COMP_HI]; - *ebx = *ecx; + *ebx = xsave_area_size(env->xcr0); } else if (count == 1) { *eax = env->features[FEAT_XSAVE]; } else if (count < ARRAY_SIZE(x86_ext_save_areas)) {
Intel SDM says for CPUID function 0DH, sub-function 0: | • ECX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components supported by this | processor. | • EBX enumerates the size (in bytes) required by the XSAVE instruction for an | XSAVE area containing all the user state components corresponding to bits | currently set in XCR0. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)